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stm32cube: update stm32wb to cube version V1.22.0
Update Cube version for STM32WBxx series on https://github.com/STMicroelectronics from version v1.20.0 to version v1.22.0 Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <[email protected]>
1 parent def7e1a commit 47f1239

34 files changed

+2993
-3024
lines changed

‎stm32cube/stm32wbxx/README‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ Origin:
66
http://www.st.com/en/embedded-software/stm32cubewb.html
77

88
Status:
9-
version v1.20.0
9+
version v1.22.0
1010

1111
Purpose:
1212
ST Microelectronics official MCU package for STM32WB series.
@@ -23,7 +23,7 @@ URL:
2323
https://github.com/STMicroelectronics/STM32CubeWB
2424

2525
Commit:
26-
529e571e91c93d4bf1aae6e0d69b9a5dcf4d828d
26+
1bc844d570ccbcfdb40532127fd50161d0b6f207
2727

2828
Maintained-by:
2929
External

‎stm32cube/stm32wbxx/drivers/include/Legacy/stm32_hal_legacy.h‎

Lines changed: 63 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -472,7 +472,9 @@ extern "C" {
472472
#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473473
#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474474
#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475+
#if !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32H7) && !defined(STM32H5)
475476
/* #define PAGESIZE FLASH_PAGE_SIZE */
477+
#endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
476478
#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
477479
#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
478480
#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -536,6 +538,10 @@ extern "C" {
536538
#define FLASH_FLAG_WDW FLASH_FLAG_WBNE
537539
#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL
538540
#endif /* STM32H7 */
541+
#if defined(STM32H7RS)
542+
#define FLASH_OPTKEY1 FLASH_OPT_KEY1
543+
#define FLASH_OPTKEY2 FLASH_OPT_KEY2
544+
#endif /* STM32H7RS */
539545
#if defined(STM32U5)
540546
#define OB_USER_nRST_STOP OB_USER_NRST_STOP
541547
#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
@@ -601,6 +607,15 @@ extern "C" {
601607
#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
602608
#endif /* STM32G4 */
603609

610+
#if defined(STM32U5)
611+
612+
#define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster
613+
#define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster
614+
#define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection
615+
#define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection
616+
617+
#endif /* STM32U5 */
618+
604619
#if defined(STM32H5)
605620
#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
606621
#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
@@ -875,6 +890,10 @@ extern "C" {
875890
#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
876891
#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
877892

893+
#if defined(STM32F3) || defined(STM32G4) || defined(STM32H7)
894+
#define HRTIMInterruptResquests HRTIMInterruptRequests
895+
#endif /* STM32F3 || STM32G4 || STM32H7 */
896+
878897
#if defined(STM32G4)
879898
#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
880899
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
@@ -1012,8 +1031,8 @@ extern "C" {
10121031
#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
10131032
#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
10141033
#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
1015-
10161034
#endif /* STM32F3 */
1035+
10171036
/**
10181037
* @}
10191038
*/
@@ -1264,10 +1283,10 @@ extern "C" {
12641283
#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12651284
#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12661285

1267-
#if defined(STM32H5) || defined(STM32H7RS)
1286+
#if defined(STM32H5) || defined(STM32H7RS) || defined(STM32N6)
12681287
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12691288
#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1270-
#endif /* STM32H5 || STM32H7RS */
1289+
#endif /* STM32H5 || STM32H7RS || STM32N6 */
12711290

12721291
#if defined(STM32WBA)
12731292
#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1279,27 +1298,27 @@ extern "C" {
12791298
#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12801299
#endif /* STM32WBA */
12811300

1282-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
1301+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
12831302
#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12841303
#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1285-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
1304+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
12861305

1287-
#if defined(STM32F7)
1306+
#if defined(STM32F7) || defined(STM32WB)
12881307
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
12891308
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_IT_ENABLE_BITS_MASK
1290-
#endif /* STM32F7 */
1309+
#endif /* STM32F7 || STM32WB */
12911310

12921311
#if defined(STM32H7)
12931312
#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X
12941313
#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT
12951314
#endif /* STM32H7 */
12961315

1297-
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0)
1316+
#if defined(STM32F7) || defined(STM32H7) || defined(STM32L0) || defined(STM32WB)
12981317
#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1
12991318
#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2
13001319
#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3
13011320
#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMP
1302-
#endif /* STM32F7 || STM32H7 || STM32L0 */
1321+
#endif /* STM32F7 || STM32H7 || STM32L0 || STM32WB */
13031322

13041323
/**
13051324
* @}
@@ -1466,7 +1485,7 @@ extern "C" {
14661485
#define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2
14671486
#endif
14681487

1469-
#if defined(STM32U5)
1488+
#if defined(STM32U5) || defined(STM32MP2)
14701489
#define OCREF_CLEAR_SELECT_Pos OCREF_CLEAR_SELECT_POS
14711490
#define OCREF_CLEAR_SELECT_Msk OCREF_CLEAR_SELECT_MSK
14721491
#endif
@@ -2014,12 +2033,12 @@ extern "C" {
20142033
/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
20152034
* @{
20162035
*/
2017-
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS)
2036+
#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) || defined(STM32N6)
20182037
#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
20192038
#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
20202039
#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
20212040
#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
2022-
#endif /* STM32H5 || STM32WBA || STM32H7RS */
2041+
#endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
20232042

20242043
/**
20252044
* @}
@@ -3679,8 +3698,10 @@ extern "C" {
36793698
#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
36803699
#endif
36813700

3701+
36823702
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \
3683-
defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0)
3703+
defined(STM32WL) || defined(STM32C0) || defined(STM32N6) || defined(STM32H7RS) || \
3704+
defined(STM32U0)
36843705
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36853706
#else
36863707
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3931,7 +3952,8 @@ extern "C" {
39313952
*/
39323953
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \
39333954
defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \
3934-
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0)
3955+
defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) || defined (STM32N6) || defined (STM32H7RS) || \
3956+
defined (STM32U0) || defined (STM32U3)
39353957
#else
39363958
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39373959
#endif
@@ -4225,6 +4247,33 @@ extern "C" {
42254247

42264248
#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
42274249
#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
4250+
#if defined(STM32U5)
4251+
#define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD
4252+
#define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK
4253+
#define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC
4254+
#define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST
4255+
#define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF
4256+
#define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT
4257+
#define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM
4258+
#define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM
4259+
#define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK
4260+
#define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ
4261+
#define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT
4262+
#define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0
4263+
#define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1
4264+
#define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM
4265+
#define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG
4266+
#define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM
4267+
#define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM
4268+
#define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT
4269+
#define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM
4270+
#define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM
4271+
#define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID
4272+
#define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0
4273+
#define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1
4274+
#define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK
4275+
#define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK
4276+
#endif
42284277
/**
42294278
* @}
42304279
*/

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_hal_hsem.h‎

Lines changed: 1 addition & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -52,64 +52,44 @@ extern "C" {
5252
* @param __SEM_MASK__: semaphores Mask
5353
* @retval None.
5454
*/
55-
#if defined(DUAL_CORE)
5655
#define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \
5756
(HSEM->C1IER |= (__SEM_MASK__)) : \
5857
(HSEM->C2IER |= (__SEM_MASK__)))
59-
#else
60-
#define __HAL_HSEM_ENABLE_IT(__SEM_MASK__) (HSEM->IER |= (__SEM_MASK__))
61-
#endif /* DUAL_CORE */
6258
/**
6359
* @brief Disables the specified HSEM interrupts.
6460
* @param __SEM_MASK__: semaphores Mask
6561
* @retval None.
6662
*/
67-
#if defined(DUAL_CORE)
6863
#define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \
6964
(HSEM->C1IER &= ~(__SEM_MASK__)) : \
7065
(HSEM->C2IER &= ~(__SEM_MASK__)))
71-
#else
72-
#define __HAL_HSEM_DISABLE_IT(__SEM_MASK__) (HSEM->IER &= ~(__SEM_MASK__))
73-
#endif /* DUAL_CORE */
7466

7567
/**
7668
* @brief Checks whether interrupt has occurred or not for semaphores specified by a mask.
7769
* @param __SEM_MASK__: semaphores Mask
7870
* @retval semaphores Mask : Semaphores where an interrupt occurred.
7971
*/
80-
#if defined(DUAL_CORE)
8172
#define __HAL_HSEM_GET_IT(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \
8273
((__SEM_MASK__) & HSEM->C1MISR) : \
83-
((__SEM_MASK__) & HSEM->C2MISR1))
84-
#else
85-
#define __HAL_HSEM_GET_IT(__SEM_MASK__) ((__SEM_MASK__) & HSEM->MISR)
86-
#endif /* DUAL_CORE */
74+
((__SEM_MASK__) & HSEM->C2MISR))
8775

8876
/**
8977
* @brief Get the semaphores release status flags.
9078
* @param __SEM_MASK__: semaphores Mask
9179
* @retval semaphores Mask : Semaphores where Release flags rise.
9280
*/
93-
#if defined(DUAL_CORE)
9481
#define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \
9582
(__SEM_MASK__) & HSEM->C1ISR : \
9683
(__SEM_MASK__) & HSEM->C2ISR)
97-
#else
98-
#define __HAL_HSEM_GET_FLAG(__SEM_MASK__) ((__SEM_MASK__) & HSEM->ISR)
99-
#endif /* DUAL_CORE */
10084

10185
/**
10286
* @brief Clears the HSEM Interrupt flags.
10387
* @param __SEM_MASK__: semaphores Mask
10488
* @retval None.
10589
*/
106-
#if defined(DUAL_CORE)
10790
#define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) ((((SCB->CPUID & 0x000000F0) >> 4 )== 0x7) ? \
10891
(HSEM->C1ICR |= (__SEM_MASK__)) : \
10992
(HSEM->C2ICR |= (__SEM_MASK__)))
110-
#else
111-
#define __HAL_HSEM_CLEAR_FLAG(__SEM_MASK__) (HSEM->ICR |= (__SEM_MASK__))
112-
#endif /* DUAL_CORE */
11393

11494
/**
11595
* @}

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_hal_pcd.h‎

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -806,20 +806,17 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
806806
\
807807
*(pdwReg) &= 0x3FFU; \
808808
\
809-
if ((wCount) > 62U) \
809+
if ((wCount) == 0U) \
810810
{ \
811-
PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
811+
*(pdwReg) |= USB_CNTRX_BLSIZE; \
812+
} \
813+
else if ((wCount) <= 62U) \
814+
{ \
815+
PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
812816
} \
813817
else \
814818
{ \
815-
if ((wCount) == 0U) \
816-
{ \
817-
*(pdwReg) |= USB_CNTRX_BLSIZE; \
818-
} \
819-
else \
820-
{ \
821-
PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
822-
} \
819+
PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
823820
} \
824821
} while(0) /* PCD_SET_EP_CNT_RX_REG */
825822

‎stm32cube/stm32wbxx/drivers/include/stm32wbxx_hal_pcd_ex.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,6 @@ extern "C" {
4747
*/
4848

4949

50-
5150
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
5251
uint16_t ep_kind, uint32_t pmaadress);
5352

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