@@ -472,7 +472,9 @@ extern "C" {
472472#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
473473#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
474474#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475+ #if !defined(STM32F2 ) && !defined(STM32F4 ) && !defined(STM32F7 ) && !defined(STM32H7 ) && !defined(STM32H5 )
475476/* #define PAGESIZE FLASH_PAGE_SIZE */
477+ #endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 && STM32H5 */
476478#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
477479#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
478480#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -601,6 +603,15 @@ extern "C" {
601603#define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD
602604#endif /* STM32G4 */
603605
606+ #if defined(STM32U5 )
607+
608+ #define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOAnalogBooster
609+ #define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOAnalogBooster
610+ #define HAL_SYSCFG_EnableIOAnalogSwitchVoltageSelection HAL_SYSCFG_EnableIOAnalogVoltageSelection
611+ #define HAL_SYSCFG_DisableIOAnalogSwitchVoltageSelection HAL_SYSCFG_DisableIOAnalogVoltageSelection
612+
613+ #endif /* STM32U5 */
614+
604615#if defined(STM32H5 )
605616#define SYSCFG_IT_FPU_IOC SBS_IT_FPU_IOC
606617#define SYSCFG_IT_FPU_DZC SBS_IT_FPU_DZC
@@ -806,6 +817,21 @@ extern "C" {
806817#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
807818#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
808819#endif /* STM32U5 */
820+
821+ #if defined(STM32WBA )
822+ #define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
823+ #define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
824+ #define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
825+ #define GPIO_AF11_RF_IO1 GPIO_AF11_RF
826+ #define GPIO_AF11_RF_IO2 GPIO_AF11_RF
827+ #define GPIO_AF11_RF_IO3 GPIO_AF11_RF
828+ #define GPIO_AF11_RF_IO4 GPIO_AF11_RF
829+ #define GPIO_AF11_RF_IO5 GPIO_AF11_RF
830+ #define GPIO_AF11_RF_IO6 GPIO_AF11_RF
831+ #define GPIO_AF11_RF_IO7 GPIO_AF11_RF
832+ #define GPIO_AF11_RF_IO8 GPIO_AF11_RF
833+ #define GPIO_AF11_RF_IO9 GPIO_AF11_RF
834+ #endif /* STM32WBA */
809835/**
810836 * @}
811837 */
@@ -860,6 +886,10 @@ extern "C" {
860886#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
861887#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
862888
889+ #if defined(STM32F3 ) || defined(STM32G4 ) || defined(STM32H7 )
890+ #define HRTIMInterruptResquests HRTIMInterruptRequests
891+ #endif /* STM32F3 || STM32G4 || STM32H7 */
892+
863893#if defined(STM32G4 )
864894#define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig
865895#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
@@ -997,8 +1027,8 @@ extern "C" {
9971027#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0)
9981028#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1)
9991029#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0)
1000-
10011030#endif /* STM32F3 */
1031+
10021032/**
10031033 * @}
10041034 */
@@ -1249,10 +1279,10 @@ extern "C" {
12491279#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12501280#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12511281
1252- #if defined(STM32H5 ) || defined(STM32H7RS )
1282+ #if defined(STM32H5 ) || defined(STM32H7RS ) || defined( STM32N6 )
12531283#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12541284#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1255- #endif /* STM32H5 || STM32H7RS */
1285+ #endif /* STM32H5 || STM32H7RS || STM32N6 */
12561286
12571287#if defined(STM32WBA )
12581288#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1264,10 +1294,10 @@ extern "C" {
12641294#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12651295#endif /* STM32WBA */
12661296
1267- #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS )
1297+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS ) || defined( STM32N6 )
12681298#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12691299#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1270- #endif /* STM32H5 || STM32WBA || STM32H7RS */
1300+ #endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
12711301
12721302#if defined(STM32F7 )
12731303#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1817,7 +1847,7 @@ extern "C" {
18171847#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
18181848#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
18191849
1820- #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((cmd == ENABLE)? \
1850+ #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((( cmd) == ENABLE)? \
18211851 HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
18221852 HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
18231853
@@ -1999,12 +2029,12 @@ extern "C" {
19992029/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
20002030 * @{
20012031 */
2002- #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS )
2032+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined(STM32H7RS ) || defined( STM32N6 )
20032033#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
20042034#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
20052035#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
20062036#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
2007- #endif /* STM32H5 || STM32WBA || STM32H7RS */
2037+ #endif /* STM32H5 || STM32WBA || STM32H7RS || STM32N6 */
20082038
20092039/**
20102040 * @}
@@ -2731,6 +2761,12 @@ extern "C" {
27312761#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
27322762#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
27332763#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
2764+ #if defined(STM32C0 )
2765+ #define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
2766+ #define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
2767+ #define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
2768+ #define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
2769+ #endif /* STM32C0 */
27342770#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
27352771#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
27362772#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3659,7 +3695,7 @@ extern "C" {
36593695#endif
36603696
36613697#if defined(STM32L4 ) || defined(STM32WB ) || defined(STM32G0 ) || defined(STM32G4 ) || defined(STM32L5 ) || \
3662- defined(STM32WL ) || defined(STM32C0 ) || defined(STM32H7RS ) || defined(STM32U0 )
3698+ defined(STM32WL ) || defined(STM32C0 ) || defined(STM32N6 ) || defined( STM32H7RS ) || defined(STM32U0 )
36633699#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36643700#else
36653701#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3910,7 +3946,8 @@ extern "C" {
39103946 */
39113947#if defined (STM32G0 ) || defined (STM32L5 ) || defined (STM32L412xx ) || defined (STM32L422xx ) || \
39123948 defined (STM32L4P5xx )|| defined (STM32L4Q5xx ) || defined (STM32G4 ) || defined (STM32WL ) || defined (STM32U5 ) || \
3913- defined (STM32WBA ) || defined (STM32H5 ) || defined (STM32C0 ) || defined (STM32H7RS ) || defined (STM32U0 )
3949+ defined (STM32WBA ) || defined (STM32H5 ) || defined (STM32C0 ) || defined (STM32N6 ) || \
3950+ defined (STM32H7RS ) || defined (STM32U0 ) || defined (STM32U3 )
39143951#else
39153952#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39163953#endif
@@ -4204,6 +4241,33 @@ extern "C" {
42044241
42054242#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
42064243#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
4244+ #if defined(STM32U5 )
4245+ #define USB_OTG_GOTGCTL_BSESVLD USB_OTG_GOTGCTL_BSVLD
4246+ #define USB_OTG_GAHBCFG_GINT USB_OTG_GAHBCFG_GINTMSK
4247+ #define USB_OTG_GUSBCFG_PHYLPCS USB_OTG_GUSBCFG_PHYLPC
4248+ #define USB_OTG_GRSTCTL_HSRST USB_OTG_GRSTCTL_PSRST
4249+ #define USB_OTG_GINTSTS_BOUTNAKEFF USB_OTG_GINTSTS_GONAKEFF
4250+ #define USB_OTG_GINTSTS_WKUINT USB_OTG_GINTSTS_WKUPINT
4251+ #define USB_OTG_GINTMSK_PXFRM_IISOOXFRM USB_OTG_GINTMSK_IPXFRM_IISOOXFRM
4252+ #define USB_OTG_GRXSTSP_EPNUM USB_OTG_GRXSTSP_EPNUM_CHNUM
4253+ #define USB_OTG_GLPMCFG_L1ResumeOK USB_OTG_GLPMCFG_L1RSMOK
4254+ #define USB_OTG_HPTXFSIZ_PTXFD USB_OTG_HPTXFSIZ_PTXFSIZ
4255+ #define USB_OTG_HCCHAR_MC USB_OTG_HCCHAR_MCNT
4256+ #define USB_OTG_HCCHAR_MC_0 USB_OTG_HCCHAR_MCNT_0
4257+ #define USB_OTG_HCCHAR_MC_1 USB_OTG_HCCHAR_MCNT_1
4258+ #define USB_OTG_HCINTMSK_AHBERR USB_OTG_HCINTMSK_AHBERRM
4259+ #define USB_OTG_HCTSIZ_DOPING USB_OTG_HCTSIZ_DOPNG
4260+ #define USB_OTG_DOEPMSK_OPEM USB_OTG_DOEPMSK_OUTPKTERRM
4261+ #define USB_OTG_DIEPCTL_SODDFRM USB_OTG_DIEPCTL_SD1PID_SODDFRM
4262+ #define USB_OTG_DIEPTSIZ_MULCNT USB_OTG_DIEPTSIZ_MCNT
4263+ #define USB_OTG_DOEPCTL_SODDFRM USB_OTG_DOEPCTL_SD1PID_SODDFRM
4264+ #define USB_OTG_DOEPCTL_DPID USB_OTG_DOEPCTL_DPID_EONUM
4265+ #define USB_OTG_DOEPTSIZ_STUPCNT USB_OTG_DOEPTSIZ_RXDPID
4266+ #define USB_OTG_DOEPTSIZ_STUPCNT_0 USB_OTG_DOEPTSIZ_RXDPID_0
4267+ #define USB_OTG_DOEPTSIZ_STUPCNT_1 USB_OTG_DOEPTSIZ_RXDPID_1
4268+ #define USB_OTG_PCGCCTL_STOPCLK USB_OTG_PCGCCTL_STPPCLK
4269+ #define USB_OTG_PCGCCTL_GATECLK USB_OTG_PCGCCTL_GATEHCLK
4270+ #endif
42074271/**
42084272 * @}
42094273 */
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