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Merged
merged 3 commits into from
Apr 30, 2025
Merged

Update the STM32MP13XX to v1.2.0 tag + various fixes #277

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e4f6a4e
stm32cube: stm32mp13xx: update hal / ll to STM32MP13 HAL tag v1.2.0
Apr 28, 2025
12d9649
stm32cube: stm32mp13xx: update CMakefiles to allow build of all HAL/LL
Apr 28, 2025
7819789
stm32cube: stm32mp13xx: update XX_hal_conf.h to allow all build
Apr 28, 2025
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31 changes: 21 additions & 10 deletions stm32cube/stm32mp13xx/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -8,35 +8,44 @@ zephyr_library_sources(drivers/src/stm32mp13xx_hal_rcc.c)
zephyr_library_sources(drivers/src/stm32mp13xx_hal_rcc_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ADC drivers/src/stm32mp13xx_hal_adc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ADC_EX drivers/src/stm32mp13xx_hal_adc_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CEC drivers/src/stm32mp13xx_hal_cec.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CORTEX drivers/src/stm32mp13xx_hal_cortex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_BSEC drivers/src/stm32mp13xx_hal_bsec.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRC drivers/src/stm32mp13xx_hal_crc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRC_EX drivers/src/stm32mp13xx_hal_crc_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRYP drivers/src/stm32mp13xx_hal_cryp.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_CRYP_EX drivers/src/stm32mp13xx_hal_cryp_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DAC drivers/src/stm32mp13xx_hal_dac.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DAC_EX drivers/src/stm32mp13xx_hal_dac_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DCMI drivers/src/stm32mp13xx_hal_dcmi.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DCMIPP drivers/src/stm32mp13xx_hal_dcmipp.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DDR drivers/src/stm32mp13xx_hal_ddr.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DFSDM drivers/src/stm32mp13xx_hal_dfsdm.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DFSDM_EX drivers/src/stm32mp13xx_hal_dfsdm_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA drivers/src/stm32mp13xx_hal_dma.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DMA_EX drivers/src/stm32mp13xx_hal_dma_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_DTS drivers/src/stm32mp13xx_hal_dts.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ETH drivers/src/stm32mp13xx_hal_eth.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_ETH_EX drivers/src/stm32mp13xx_hal_eth_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_EXTI drivers/src/stm32mp13xx_hal_exti.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_FDCAN drivers/src/stm32mp13xx_hal_fdcan.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_GPIO drivers/src/stm32mp13xx_hal_gpio.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_HASH drivers/src/stm32mp13xx_hal_hash.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_HASH_EX drivers/src/stm32mp13xx_hal_hash_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_HSEM drivers/src/stm32mp13xx_hal_hsem.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_HCD drivers/src/stm32mp13xx_hal_hcd.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_I2C drivers/src/stm32mp13xx_hal_i2c.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_I2C_EX drivers/src/stm32mp13xx_hal_i2c_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_IPCC drivers/src/stm32mp13xx_hal_ipcc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_I2S drivers/src/stm32mp13xx_hal_i2s.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_IWDG drivers/src/stm32mp13xx_hal_iwdg.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_LPTIM drivers/src/stm32mp13xx_hal_lptim.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_MDIOS drivers/src/stm32mp13xx_hal_mdios.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_LTDC drivers/src/stm32mp13xx_hal_ltdc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_MCE drivers/src/stm32mp13xx_hal_mce.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_MDMA drivers/src/stm32mp13xx_hal_mdma.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_MMC drivers/src/stm32mp13xx_hal_mmc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_MMC_EX drivers/src/stm32mp13xx_hal_mmc_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_NAND drivers/src/stm32mp13xx_hal_nand.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PCD drivers/src/stm32mp13xx_hal_pcd.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PCD_EX drivers/src/stm32mp13xx_hal_pcd_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PKA drivers/src/stm32mp13xx_hal_pka.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PWR drivers/src/stm32mp13xx_hal_pwr.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_PWR_EX drivers/src/stm32mp13xx_hal_pwr_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_QSPI drivers/src/stm32mp13xx_hal_qspi.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RNG drivers/src/stm32mp13xx_hal_rng.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RNG_EX drivers/src/stm32mp13xx_hal_rng_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RTC drivers/src/stm32mp13xx_hal_rtc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_RTC_EX drivers/src/stm32mp13xx_hal_rtc_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_SAI drivers/src/stm32mp13xx_hal_sai.c)
Expand All @@ -57,7 +66,7 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_UART drivers/src/stm32mp13xx_h
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_UART_EX drivers/src/stm32mp13xx_hal_uart_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_USART drivers/src/stm32mp13xx_hal_usart.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_USART_EX drivers/src/stm32mp13xx_hal_usart_ex.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_WWDG drivers/src/stm32mp13xx_hal_wwdg.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_HAL_XSPI drivers/src/stm32mp13xx_hal_xspi.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_ADC drivers/src/stm32mp13xx_ll_adc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_DELAYBLOCK drivers/src/stm32mp13xx_ll_delayblock.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_DMA drivers/src/stm32mp13xx_ll_dma.c)
Expand All @@ -66,10 +75,12 @@ zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_FMC drivers/src/stm32mp13xx_ll_
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_GPIO drivers/src/stm32mp13xx_ll_gpio.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_I2C drivers/src/stm32mp13xx_ll_i2c.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_LPTIM drivers/src/stm32mp13xx_ll_lptim.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_MDMA drivers/src/stm32mp13xx_ll_mdma.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_PWR drivers/src/stm32mp13xx_ll_pwr.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_RCC drivers/src/stm32mp13xx_ll_rcc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_RTC drivers/src/stm32mp13xx_ll_rtc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_SDMMC drivers/src/stm32mp13xx_ll_sdmmc.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_SPI drivers/src/stm32mp13xx_ll_spi.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_TIM drivers/src/stm32mp13xx_ll_tim.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_USART drivers/src/stm32mp13xx_ll_usart.c)
zephyr_library_sources_ifdef(CONFIG_USE_STM32_LL_USB drivers/src/stm32mp13xx_ll_usb.c)
28 changes: 14 additions & 14 deletions stm32cube/stm32mp13xx/drivers/include/Legacy/stm32_hal_legacy.h
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Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,7 @@ extern "C" {
#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
#if defined(STM32L0)
#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM
#define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM
input 1 for COMP1, LPTIM input 2 for COMP2 */
#endif
#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
Expand Down Expand Up @@ -241,9 +241,9 @@ extern "C" {
*/
#if defined(STM32H5) || defined(STM32C0)
#else
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for
inter STM32 series compatibility */
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for
inter STM32 series compatibility */
#endif
/**
Expand Down Expand Up @@ -1558,35 +1558,35 @@ extern "C" {
#define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
#define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
#define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to
#define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to
the MAC transmitter) */
#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from
#define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from
MAC transmitter */
#define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus
or flushing the TxFIFO */
#define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status
#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status
of previous frame or IFG/backoff period to be over */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and
#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and
transmitting a Pause control frame (in full duplex mode) */
#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input
#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input
frame for transmission */
#define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
#define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control
#define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control
de-activate threshold */
#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control
#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control
activate threshold */
#define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
#if defined(STM32F1)
#else
#define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
#define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status
#define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status
(or time-stamp) */
#endif
#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and
#define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and
status */
#define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
#define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
Expand Down Expand Up @@ -2454,9 +2454,9 @@ extern "C" {
/** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
* @{
*/
#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is
#define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is
done into HAL_COMP_Init() */
#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is
#define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is
done into HAL_COMP_Init() */
/**
* @}
Expand Down
9 changes: 9 additions & 0 deletions stm32cube/stm32mp13xx/drivers/include/stm32mp13xx_hal_adc_ex.h
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Original file line number Diff line number Diff line change
Expand Up @@ -758,7 +758,16 @@ typedef struct
* @param __HANDLE__ ADC handle.
* @retval SET (ADC instance is valid) or RESET (ADC instance is invalid)
*/
#if defined(ADC1) & !defined(ADC2)
#define ADC_VREFINT_INSTANCE(__HANDLE__) ((__HANDLE__)->Instance == ADC1)
#endif
#if defined(ADC2) & !defined(ADC1)
#define ADC_VREFINT_INSTANCE(__HANDLE__) ((__HANDLE__)->Instance == ADC2)
#endif
#if defined(ADC1) & defined(ADC2)
#define ADC_VREFINT_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC2))
#endif

/**
* @brief Verify the ADC instance connected to the internal voltage reference VDDCORE.
* @param __HANDLE__ ADC handle.
Expand Down
20 changes: 10 additions & 10 deletions stm32cube/stm32mp13xx/drivers/include/stm32mp13xx_hal_cryp.h
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Original file line number Diff line number Diff line change
Expand Up @@ -420,7 +420,7 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point

#define CRYP_FLAG_WRERR (SAES_SR_WRERR | 0x80000000U) /*!< SAES peripheral Write Error flag */
#define CRYP_FLAG_RDERR (SAES_SR_RDERR | 0x80000000U) /*!< SAES peripheral Read error flag */
#define CRYP_FLAG_CCF SAES_SR_CCF /*!< SAES peripheral Computation completed flag
#define CRYP_FLAG_CCF SAES_SR_CCF /*!< SAES peripheral Computation completed flag
as AES_ISR_CCF */
#define CRYP_FLAG_KEIF SAES_ISR_KEIF /*!< SAES peripheral Key error interrupt flag */
#define CRYP_FLAG_RWEIF SAES_ISR_RWEIF /*!< SAES peripheral Read or Write error Interrupt flag */
Expand All @@ -447,7 +447,7 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point
* @{
*/

#define CRYP_KEYIVCONFIG_ALWAYS 0x00000000U /*!< Peripheral Key and IV configuration
#define CRYP_KEYIVCONFIG_ALWAYS 0x00000000U /*!< Peripheral Key and IV configuration
to do systematically */
#define CRYP_KEYIVCONFIG_ONCE 0x00000001U /*!< Peripheral Key and IV configuration
to do only once */
Expand All @@ -462,7 +462,7 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point
*/

#define CRYP_KEYMODE_NORMAL 0x00000000U /*!< Normal key usage, Key registers are freely usable */
#define CRYP_KEYMODE_WRAPPED SAES_CR_KMOD_0 /*!< Only for SAES, Wrapped key: to encrypt
#define CRYP_KEYMODE_WRAPPED SAES_CR_KMOD_0 /*!< Only for SAES, Wrapped key: to encrypt
or decrypt AES keys */
#define CRYP_KEYMODE_SHARED SAES_CR_KMOD_1 /*!< Key shared by SAES peripheral */
/**
Expand All @@ -474,16 +474,16 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point
*/

#define CRYP_KEYSEL_NORMAL 0x00000000U /*!< Normal key, key registers SAES_KEYx or CRYP_KEYx */
#define CRYP_KEYSEL_HW SAES_CR_KEYSEL_0 /*!< Only for SAES, Hardware key : derived hardware
#define CRYP_KEYSEL_HW SAES_CR_KEYSEL_0 /*!< Only for SAES, Hardware key : derived hardware
unique key (DHUK 256-bit) */
#define CRYP_KEYSEL_SW SAES_CR_KEYSEL_1 /*!< Only for SAES, Software key : boot hardware
#define CRYP_KEYSEL_SW SAES_CR_KEYSEL_1 /*!< Only for SAES, Software key : boot hardware
key BHK (256-bit) */
#define CRYP_KEYSEL_HSW SAES_CR_KEYSEL_2 /*!< Only for SAES, DHUK XOR BHK Hardware unique
#define CRYP_KEYSEL_HSW SAES_CR_KEYSEL_2 /*!< Only for SAES, DHUK XOR BHK Hardware unique
key XOR software key */
#define CRYP_KEYSEL_AHK (SAES_CR_KEYSEL_1|SAES_CR_KEYSEL_0) /*!< Only for SAES, Software key :
#define CRYP_KEYSEL_AHK (SAES_CR_KEYSEL_1|SAES_CR_KEYSEL_0) /*!< Only for SAES, Software key :
application hardware key AHK (128- or 256-bit) */
#define CRYP_KEYSEL_DUK_AHK (SAES_CR_KEYSEL_2|SAES_CR_KEYSEL_0) /*!< Only for SAES, DHUK XOR AHK */
#define CRYP_KEYSEL_TEST_KEY (SAES_CR_KEYSEL_2|SAES_CR_KEYSEL_1|SAES_CR_KEYSEL_0) /*!< Test mode key (256-bit
#define CRYP_KEYSEL_TEST_KEY (SAES_CR_KEYSEL_2|SAES_CR_KEYSEL_1|SAES_CR_KEYSEL_0) /*!< Test mode key (256-bit
hardware constant key 0xA5A5...A5A5) */
/**
* @}
Expand All @@ -494,9 +494,9 @@ typedef void (*pCRYP_CallbackTypeDef)(CRYP_HandleTypeDef *hcryp); /*!< point
* @{
*/

#define CRYP_KEYPROT_ENABLE SAES_CR_KEYPROT /*!< Only for SAES, Key can't be shared between
#define CRYP_KEYPROT_ENABLE SAES_CR_KEYPROT /*!< Only for SAES, Key can't be shared between
two applications with different security contexts */
#define CRYP_KEYPROT_DISABLE 0x00000000U /*!< Only for SAES, Key can be shared between
#define CRYP_KEYPROT_DISABLE 0x00000000U /*!< Only for SAES, Key can be shared between
two applications with different security contexts */

/**
Expand Down
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