Revert "simplelink: update to Ti SimpleLink SDK 7.41.00.17"

This reverts commit 46407c7.

Author: Ayush1325

simplelink/CMakeLists.txt

@@ -79,9 +79,7 @@ elseif(CONFIG_HAS_CC13X2_CC26X2_SDK OR CONFIG_HAS_CC13X2X7_CC26X2X7_SDK)
   zephyr_library_compile_definitions(${COMPILER})
   zephyr_library_sources(
     source/ti/drivers/power/PowerCC26X2.c
-    source/ti/drivers/power/PowerCC26X2_helpers.c
     source/ti/drivers/power/PowerCC26X2_calibrateRCOSC.c
-    source/ti/drivers/power/PowerCC26X2_calibrateRCOSC_helpers.c
     source/ti/drivers/utils/List.c
     source/ti/drivers/rf/RFCC26X2_multiMode.c
     source/ti/drivers/temperature/TemperatureCC26X2.c

simplelink/README

@@ -2,39 +2,31 @@ The SimpleLink SDKs provide peripheral driver and WiFi libraries
 and hardware register access header files for the Texas Instruments
 SimpleLink SoCs.
 
-1. CC13x2/26x2 SDK
-
 For an explanation of the SimpleLink family SDK directory structure, see:
+http://dev.ti.com/tirex/content/simplelink_cc32xx_sdk_2_40_01_01/docs/simplelink_mcu_sdk/Users_Guide.html#directory-structure
 
-https://dev.ti.com/tirex/explore/node?node=A__AGhAXIxP6gouUA7QxaW0Lg__com.ti.SIMPLELINK_CC13XX_CC26XX_SDK__BSEc4rl__LATEST&placeholder=true
+1. CC13x2/26x2 SDK
 
 The current version supported in Zephyr is the SimpleLink CC13x2 and CC26x2 SDK
-7.41.00.17, downloaded from:
+4.40.04.04, downloaded from:
 
   http://www.ti.com/tool/simplelink-cc13x2-26x2-sdk
 
 The driver library source is copied from the SDK, as follows:
 
   EXT_DIR=$HOME/hal_ti/simplelink/source/ti
-  pushd simplelink_cc13x2_26x2_sdk_7_41_00_17/source/ti
+  pushd simplelink_cc13x2_26x2_sdk_4_40_04_04/source/ti
   find devices/cc13x2_cc26x2/{driverlib,inc,rf_patches} -depth -name '*.[c|h]' -print0 | cpio --null -pvdm $EXT_DIR
   find devices/cc13x2_cc26x2/startup_files -depth -name ccfg.c -print0 | cpio --null -pvd $EXT_DIR
-  find devices/cc13x2x7_cc26x2x7/{driverlib,inc,rf_patches} -depth -name '*.[c|h]' -print0 | cpio --null -pvdm $EXT_DIR
-  find devices/cc13x2x7_cc26x2x7/startup_files -depth -name ccfg.c -print0 | cpio --null -pvd $EXT_DIR
-  mkdir -p $EXT_DIR/drivers/power
-  cp drivers/*.h $EXT_DIR/drivers/.
   cp -r drivers/power/* $EXT_DIR/drivers/power/.
   mkdir $EXT_DIR/drivers/temperature
   cp -r drivers/temperature/* $EXT_DIR/drivers/temperature/.
-  mkdir $EXT_DIR/drivers/utils
-  cp -r drivers/utils/* $EXT_DIR/drivers/utils/.
   cp drivers/Temperature.* $EXT_DIR/drivers/.
   mkdir $EXT_DIR/drivers/rf
   cp drivers/rf/RF.h $EXT_DIR/drivers/rf/.
   cp drivers/rf/RFCC26X2.h $EXT_DIR/drivers/rf/.
   cp drivers/rf/RFCC26X2_multiMode.c $EXT_DIR/drivers/rf/.
   find $EXT_DIR/devices/cc13x2_cc26x2 -name '*.[c|h]' -exec dos2unix {} \;
-  find $EXT_DIR/devices/cc13x2x7_cc26x2x7 -name '*.[c|h]' -exec dos2unix {} \;
   find $EXT_DIR/drivers/power -name '*.[c|h]' -exec dos2unix {} \;
   find $EXT_DIR/drivers/rf -name '*.[c|h]' -exec dos2unix {} \;
   find $EXT_DIR/drivers/temperature -name '*.[c|h]' -exec dos2unix {} \;

simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/adi.c

@@ -1,9 +1,11 @@
 /******************************************************************************
 *  Filename:       adi.c
+*  Revised:        2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
+*  Revision:       47706
 *
 *  Description:    Driver for the ADI interface
 *
-*  Copyright (c) 2015 - 2022, Texas Instruments Incorporated
+*  Copyright (c) 2015 - 2020, Texas Instruments Incorporated
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
@@ -34,4 +36,8 @@
 *
 ******************************************************************************/
 
+#include "../inc/hw_types.h"
+#include "../inc/hw_memmap.h"
+#include "../inc/hw_aux_smph.h"
 #include "adi.h"
+#include "cpu.h"

simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/adi.h

@@ -1,9 +1,11 @@
 /******************************************************************************
 *  Filename:       adi.h
+*  Revised:        2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
+*  Revision:       47706
 *
 *  Description:    Defines and prototypes for the ADI master interface.
 *
-*  Copyright (c) 2015 - 2022, Texas Instruments Incorporated
+*  Copyright (c) 2015 - 2020, Texas Instruments Incorporated
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without

simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/adi_doc.h

@@ -1,7 +1,9 @@
 /******************************************************************************
 *  Filename:       adi_doc.h
+*  Revised:        2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
+*  Revision:       45971
 *
-*  Copyright (c) 2015 - 2022, Texas Instruments Incorporated
+*  Copyright (c) 2015 - 2020, Texas Instruments Incorporated
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without

simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/aes.c

@@ -1,9 +1,12 @@
+
 /******************************************************************************
-*  Filename:       aes.c
+*  Filename:       crypto.c
+*  Revised:        2020-08-25 16:10:23 +0200 (Tue, 25 Aug 2020)
+*  Revision:       58298
 *
-*  Description:    Driver for the AES functions of the crypto module
+*  Description:    Driver for the aes functions of the crypto module
 *
-*  Copyright (c) 2015 - 2022, Texas Instruments Incorporated
+*  Copyright (c) 2015 - 2020, Texas Instruments Incorporated
 *  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
@@ -65,26 +68,6 @@
 
 
 
-#ifndef CRYPTO_SWRESET_SW_RESET
-/* This definition is missing in hw_crypto.h for  CC26X0 and CC13X0 devices */
-#define CRYPTO_SWRESET_SW_RESET  0x00000001
-#endif
-
-#ifndef CRYPTO_DMASWRESET_SWRES
-/* This definition is missing in hw_crypto.h for CC26X0 and CC13X0 devices */
-#define CRYPTO_DMASWRESET_SWRES  0x00000001
-#endif
-
-#ifndef CRYPTO_DMASTAT_CH0_ACT
-/* This definition is missing in hw_crypto.h for  CC26X0 and CC13X0 devices */
-#define CRYPTO_DMASTAT_CH0_ACT   0x00000001
-#endif
-
-#ifndef CRYPTO_DMASTAT_CH1_ACT
-/* This definition is missing in hw_crypto.h for  CC26X0 and CC13X0 devices */
-#define CRYPTO_DMASTAT_CH1_ACT   0x00000002
-#endif
-
 //*****************************************************************************
 //
 // Load the initialization vector.
@@ -99,36 +82,6 @@ void AESSetInitializationVector(const uint32_t *initializationVector)
     HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3) = initializationVector[3];
 }
 
-//*****************************************************************************
-//
-// Read the IV for Authenticated Modes (CCM or GCM) after the tag has been read.
-//
-//*****************************************************************************
-void AESReadAuthenticationModeIV(uint32_t *iv)
-{
-    /* Read the computed IV out from the hw registers */
-    iv[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0);
-    iv[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESIV1);
-    iv[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESIV2);
-    /* This read will clear the saved_context_ready bit
-     * and allow the AES core to start the next operation.
-     */
-    iv[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3);
-}
-
-//*****************************************************************************
-//
-// Read the IV for Non-Authenticated Modes (CBC or CTR).
-//
-//*****************************************************************************
-void AESReadNonAuthenticationModeIV(uint32_t *iv)
-{
-    /* Wait until the saved context is ready */
-    while(!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M));
-
-    AESReadAuthenticationModeIV(iv);
-}
-
 //*****************************************************************************
 //
 // Start a crypto DMA operation.
@@ -193,7 +146,7 @@ uint32_t AESWaitForIRQFlags(uint32_t irqFlags)
 
 //*****************************************************************************
 //
-// Transfer a key from CPU memory to a key store location.
+// Transfer a key from CM3 memory to a key store location.
 //
 //*****************************************************************************
 uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea)
@@ -212,8 +165,6 @@ uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32
            (aesKeyLength == AES_192_KEY_LENGTH_BYTES) ||
            (aesKeyLength == AES_256_KEY_LENGTH_BYTES));
 
-    // This buffer must be declared at function scope to prevent LLVM compiler from optimizing out memcpy.
-    uint8_t paddedKey[AES_256_KEY_LENGTH_BYTES] = {0};
     uint32_t keySize = 0;
 
     switch (aesKeyLength) {
@@ -256,19 +207,8 @@ uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32
     // Enable key to write (e.g. Key 0).
     HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = 1 << keyStoreArea;
 
-    if (aesKeyLength == AES_192_KEY_LENGTH_BYTES)
-    {
-        // Writing a 192-bit key to the key store RAM must be done by writing
-        // 256 bits of data with the 64 most significant bits set to zero.
-        memcpy(paddedKey, aesKey, AES_192_KEY_LENGTH_BYTES);
-
-        AESStartDMAOperation(paddedKey, AES_256_KEY_LENGTH_BYTES, 0, 0);
-    }
-    else
-    {
-        // Total key length in bytes (16 for 1 x 128-bit key and 32 for 1 x 256-bit key).
-        AESStartDMAOperation(aesKey, aesKeyLength, 0, 0);
-    }
+    // Total key length in bytes (16 for 1 x 128-bit key and 32 for 1 x 256-bit key).
+    AESStartDMAOperation(aesKey, aesKeyLength, 0, 0);
 
     // Wait for the DMA operation to complete.
     uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR);
@@ -430,122 +370,3 @@ void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength)
 
     AESSetInitializationVector(initializationVector.word);
 }
-
-//*****************************************************************************
-//
-// Write AES_KEY2 registers
-//
-//*****************************************************************************
-void AESWriteKey2(const uint32_t *key2) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY20) = key2[0];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY21) = key2[1];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY22) = key2[2];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY23) = key2[3];
-}
-
-//*****************************************************************************
-//
-// Write AES_KEY3 register
-//
-//*****************************************************************************
-void AESWriteKey3(const uint32_t *key3) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY30) = key3[0];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY31) = key3[1];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY32) = key3[2];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY33) = key3[3];
-}
-
-//*****************************************************************************
-//
-// Clear AES_DATA_IN registers
-//
-//*****************************************************************************
-void AESClearDataIn(void) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN0) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN1) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN2) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN3) = 0;
-}
-
-//*****************************************************************************
-//
-// Write AES_DATA_IN registers
-//
-//*****************************************************************************
-void AESWriteDataIn(const uint32_t *dataInBuffer) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN0) = dataInBuffer[0];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN1) = dataInBuffer[1];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN2) = dataInBuffer[2];
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAIN3) = dataInBuffer[3];
-}
-
-//*****************************************************************************
-//
-// Read AES_DATA_OUT registers
-//
-//*****************************************************************************
-void AESReadDataOut(uint32_t *dataOutBuffer) {
-    dataOutBuffer[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAOUT0);
-    dataOutBuffer[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAOUT1);
-    dataOutBuffer[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAOUT2);
-    dataOutBuffer[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESDATAOUT3);
-}
-
-//*****************************************************************************
-//
-// Clear AES_KEY2 registers
-//
-//*****************************************************************************
-void AESClearKey2(void) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY20) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY21) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY22) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY23) = 0;
-}
-
-//*****************************************************************************
-//
-// Clear AES_KEY3 registers
-//
-//*****************************************************************************
-void AESClearKey3(void) {
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY30) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY31) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY32) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_AESKEY33) = 0;
-}
-
-
-//*****************************************************************************
-//
-// Reset crypto engine
-//
-//*****************************************************************************
-void AESReset(void)
-{
-    /* Soft reset routine per SafeXcel */
-    HWREG(CRYPTO_BASE + CRYPTO_O_SWRESET) = CRYPTO_SWRESET_SW_RESET;
-    AESSetCtrl(0);
-    AESSetDataLength(0);
-    AESSetAuthLength(0);
-
-    /* Only CC26X2, CC13X2, CC26X2F6, CC13X2F6, CC26X4, and CC13X4 devices have hash support */
-    HWREG(CRYPTO_BASE + CRYPTO_O_HASHMODE) = 0;
-    HWREG(CRYPTO_BASE + CRYPTO_O_HASHINLENL) = 0;
-    /* CRYPTO_O_HASHINLENH is automatically set to 0 by HW */
-}
-
-//*****************************************************************************
-//
-// Reset crypto DMA
-//
-//*****************************************************************************
-void AESDMAReset(void)
-{
-    /* Reset DMA */
-    HWREG(CRYPTO_BASE + CRYPTO_O_DMASWRESET) = CRYPTO_DMASWRESET_SWRES;
-
-    /* Wait for DMA channels to be inactive */
-    while (HWREG(CRYPTO_BASE + CRYPTO_O_DMASTAT) &
-           (CRYPTO_DMASTAT_CH0_ACT | CRYPTO_DMASTAT_CH1_ACT));
-}