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Min Xujpanisbl
Min Xu
authored and
jpanisbl
committed
hal: drivers: radio: Port radio driver for F3 devices to Zephyr
Port RCL (radio control layer), the radio driver for TI F3 devices to Zephyr. This commit includes the source files of RCL, binary images of modem firmwares, and pre-generated radio settings for adc noise and BLE5. NOTE: currently, the radio settings for BLE5 are compiled as part of the driver library by default, which is a workaround for now. Signed-off-by: Min Xu <[email protected]>
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‎simplelink_lpf3/CMakeLists.txt‎

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# Copyright (c) 2024, Texas Instruments Incorporated
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# * Neither the name of Texas Instruments Incorporated nor the names of
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# its contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# All targets in this file are for Cortex-M0P
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add_subdirectory(source/ti/devices)
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add_subdirectory(source/ti/boards)
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if(CONFIG_HAS_CC23X0_SDK)
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zephyr_linker_sources(RAM_SECTIONS
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${CMAKE_CURRENT_SOURCE_DIR}/source/ti/drivers/dma/dma.ld
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)
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# Radio Control Layer (RCL) driver
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if(CONFIG_SIMPLELINK_F3_RADIO_DRIVER)
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zephyr_library_sources(
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source/ti/drivers/rcl/LRF.c
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source/ti/drivers/rcl/LRFCC23X0.c
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source/ti/drivers/rcl/RCL_Buffer.c
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source/ti/drivers/rcl/RCL_Debug.c
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source/ti/drivers/rcl/RCL_Profiling.c
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source/ti/drivers/rcl/RCL_Scheduler.c
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source/ti/drivers/rcl/RCL_Tracer.c
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source/ti/drivers/rcl/RCL.c
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source/ti/drivers/rcl/handlers/adc_noise.c
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source/ti/drivers/rcl/handlers/ble_cs.c
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source/ti/drivers/rcl/handlers/ble5.c
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source/ti/drivers/rcl/handlers/generic.c
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source/ti/drivers/rcl/hal/cc23x0/hal_cc23x0.c
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source/ti/drivers/rcl/wrappers/RCL_AdcNoise.c
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)
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endif()
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endif()

‎simplelink_lpf3/source/ti/boards/CMakeLists.txt‎

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# Copyright (c) 2024, Texas Instruments Incorporated
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# * Neither the name of Texas Instruments Incorporated nor the names of
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# its contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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add_subdirectory_ifdef(CONFIG_HAS_CC23X0_SDK cc23x0r5)

‎simplelink_lpf3/source/ti/boards/cc23x0r5/CMakeLists.txt‎

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# Copyright (c) 2022-2024, Texas Instruments Incorporated
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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#
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# * Neither the name of Texas Instruments Incorporated nor the names of
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# its contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# All targets in this file are for Cortex-M0P
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if(CONFIG_SIMPLELINK_F3_RADIO_DRIVER)
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zephyr_include_directories(
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.
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)
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zephyr_library()
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zephyr_library_sources(
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rcl_settings_adc_noise.c
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)
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# [Workaround]: Include the radio settings for ble by defualt
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# TODO: radio settings should be selectable, see ZEPHYR-24
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zephyr_library_sources_ifdef(CONFIG_SIMPLELINK_F3_RF_SETTING_PREGEN rcl_settings_ble.c)
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endif()

‎simplelink_lpf3/source/ti/boards/cc23x0r5/rcl_settings_adc_noise.c‎

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// SETTINGS FOR PHY BASED ON RADIO CONTROL LAYER (SOURCE FILE)
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//
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//
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// CODE EXPORT INFORMATION
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// This file is generated
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//
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// Tool name SmartRF Studio 8
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// Tool version 0.6.0.327 INTERNAL
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// Created 2024-05-28 13:53:16.066
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// Computer swtools
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// User -
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//
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//
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// WORKSPACE INFORMATION
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//
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// Workspace file srf_cli.workspace
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// Device CC2340R5
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// Package QFN40 5x5 RKP
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// Revision(s) B (2.0)
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// SDK SimpleLink LPF3 SDK 8.11.00.09
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// Board LP-EM-CC2340R5
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// PHY ADC Noise
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// PHY abbreviation adc_noise
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//
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//
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// VALIDATION WARNINGS
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//
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// No warnings
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#include "rcl_settings_adc_noise.h"
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#include DeviceFamily_constructPath(rf_patches/lrf_rfe_binary_ble5.h)
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// Configuration: Common
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static const uint32_t LRF_commonRegConfig[] =
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{
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0x0000002C, // Segment length = 44
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0x0000A002, // Data structure 32-bit region (start byte position = 0, count = 3)
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(uint32_t) &LRF_swConfigAdcNoise, // LRF_swParam : swConfig
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0x00000000, // LRF_swParam : txPowerTable
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(uint32_t) &(fcfg->appTrims), // LRF_swParam : trimDef
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0x00003003, // HW sparse region (address/value pairs, count = 4)
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0x30800000, // LRFDRFE.MAGNTHRCFG
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0x30880000, // LRFDRFE.RSSIOFFSET
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0x31201820, // LRFDRFE.MISC0
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0x31300C07, // LRFDRFE.PHEDISC
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0x30A01002, // HW 16-bit region (start address = 0x30A0, count = 3)
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0x1F40A246, // LRFDRFE.SPARE3 LRFDRFE.SPARE2
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0x00000000, // - LRFDRFE.SPARE4
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0x30B01002, // HW 16-bit region (start address = 0x30B0, count = 3)
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0x0006000A, // LRFDRFE.IFAMPRFLDO LRFDRFE.LNA
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0x00000000, // - LRFDRFE.PA0
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0x30C40005, // HW zero region (start address = 0x30C4, count = 6)
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0x30E4100C, // HW 16-bit region (start address = 0x30E4, count = 13)
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0x00000200, // LRFDRFE.DCO LRFDRFE.ATSTREFH
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0x00000008, // LRFDRFE.DIVLDO LRFDRFE.DIV
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0x00000000, // LRFDRFE.DCOLDO0 LRFDRFE.TDCLDO
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0x07060000, // LRFDRFE.PRE0 LRFDRFE.DCOLDO1
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0x06050000, // LRFDRFE.PRE2 LRFDRFE.PRE1
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0x40080603, // LRFDRFE.CAL0 LRFDRFE.PRE3
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0x00007F00, // - LRFDRFE.CAL1
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0x31381002, // HW 16-bit region (start address = 0x3138, count = 3)
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0x047FDF7F, // LRFDRFE.PLLMON1 LRFDRFE.PLLMON0
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0x00001804, // - LRFDRFE.MOD0
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0x68046005, // RAM 32-bit region (start address = 0x6804, count = 6)
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0x03000012, // RFE_COMMON_RAM.TDCCAL0 RFE_COMMON_RAM.SYNTHCTL
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0x00100000, // RFE_COMMON_RAM.TDCCAL2 RFE_COMMON_RAM.TDCCAL1
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0x569B0400, // RFE_COMMON_RAM.K1LSB RFE_COMMON_RAM.TDCPLL
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0x012D010A, // RFE_COMMON_RAM.K2BL RFE_COMMON_RAM.K1MSB
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0x132C0034, // RFE_COMMON_RAM.K3BL RFE_COMMON_RAM.K2AL
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0x916F07AB, // RFE_COMMON_RAM.K5 RFE_COMMON_RAM.K3AL
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0x68206005, // RAM 32-bit region (start address = 0x6820, count = 6)
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0x00000000, // RFE_COMMON_RAM.RTRIMMIN RFE_COMMON_RAM.RTRIMOFF
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0x48080008, // RFE_COMMON_RAM.DIVF RFE_COMMON_RAM.DIVI
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0x00000000, // RFE_COMMON_RAM.DIVLDOF RFE_COMMON_RAM.DIVLDOI
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0x00470014, // RFE_COMMON_RAM.LDOSETTLE RFE_COMMON_RAM.DIVLDOIOFF
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0x0005002E, // RFE_COMMON_RAM.DCOSETTLE RFE_COMMON_RAM.CHRGSETTLE
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0x0000FE00, // RFE_COMMON_RAM.IFAMPRFLDODEFAULT RFE_COMMON_RAM.IFAMPRFLDOTX
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0x683E5003, // RAM 16-bit region (start address = 0x683E, count = 4)
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0x00220050, // RFE_COMMON_RAM.SPARE0SHADOW RFE_COMMON_RAM.PHYRSSIOFFSET
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0x00000045 // RFE_COMMON_RAM.AGCINFO RFE_COMMON_RAM.SPARE1SHADOW
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};
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// LRF register configuration list
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static const LRF_RegConfigList LRF_regConfigList = {
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.numEntries = 1,
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.entries = {
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(LRF_ConfigWord*) LRF_commonRegConfig
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}
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};
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// LRF_SwConfig data structure
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const LRF_SwConfig LRF_swConfigAdcNoise = {
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.rxIntFrequency = 0,
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.rxFrequencyOffset = 0,
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.txFrequencyOffset = 0,
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.modFrequencyDeviation = 0x00000000,
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.txShape = (LRF_TxShape*) 0,
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.bwIndex = 0x01,
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.bwIndexDither = 0x01
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};
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// LRF_Config data structure
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const LRF_Config LRF_configAdcNoise = {
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.pbeImage = (LRF_TOPsmImage*) 0,
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.mceImage = (LRF_TOPsmImage*) 0,
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.rfeImage = (const LRF_TOPsmImage*) LRF_RFE_binary_ble5,
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.regConfigList = &LRF_regConfigList
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};

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