Skip to content

Commit 70af708

Browse files
ioannisgnvlsianpu
authored andcommitted
boot: zephyr: clean ARM core configuration only when selected by user
Clean up the ARM core configuration only when the CONFIG_MCUBOOT_CLEANUP_ARM_CORE is selected. This involves cache and stack pointer limit registers. Add also an MPU cleanup in platforms with the ARM MPU supported. Signed-off-by: Ioannis Glaropoulos <[email protected]>
1 parent 518d93a commit 70af708

File tree

3 files changed

+31
-6
lines changed

3 files changed

+31
-6
lines changed

boot/zephyr/arm_cleanup.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,3 +20,15 @@ void cleanup_arm_nvic(void) {
2020
NVIC->ICPR[i] = 0xFFFFFFFF;
2121
}
2222
}
23+
24+
__weak void z_arm_clear_arm_mpu_config(void)
25+
{
26+
int i;
27+
28+
int num_regions =
29+
((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
30+
31+
for (i = 0; i < num_regions; i++) {
32+
ARM_MPU_ClrRegion(i);
33+
}
34+
}

boot/zephyr/include/arm_cleanup.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,4 +12,12 @@
1212
* Cleanup interrupt priority and interupt enable registers.
1313
*/
1414
void cleanup_arm_nvic(void);
15+
16+
#if defined(CONFIG_CPU_HAS_ARM_MPU)
17+
/**
18+
* Cleanup all ARM MPU region configuration
19+
*/
20+
void z_arm_clear_arm_mpu_config(void);
21+
#endif
22+
1523
#endif

boot/zephyr/main.c

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -131,12 +131,6 @@ static void do_boot(struct boot_rsp *rsp)
131131
rsp->br_image_off +
132132
rsp->br_hdr->ih_hdr_size);
133133

134-
#ifdef CONFIG_CPU_CORTEX_M7
135-
/* Disable instruction cache and data cache before chain-load the application */
136-
SCB_DisableDCache();
137-
SCB_DisableICache();
138-
#endif
139-
140134
irq_lock();
141135
#ifdef CONFIG_SYS_CLOCK_EXISTS
142136
sys_clock_disable();
@@ -147,6 +141,15 @@ static void do_boot(struct boot_rsp *rsp)
147141
#endif
148142
#if CONFIG_MCUBOOT_CLEANUP_ARM_CORE
149143
cleanup_arm_nvic(); /* cleanup NVIC registers */
144+
145+
#ifdef CONFIG_CPU_CORTEX_M7
146+
/* Disable instruction cache and data cache before chain-load the application */
147+
SCB_DisableDCache();
148+
SCB_DisableICache();
149+
#endif
150+
151+
#if CONFIG_CPU_HAS_ARM_MPU
152+
z_arm_clear_arm_mpu_config();
150153
#endif
151154

152155
#if defined(CONFIG_BUILTIN_STACK_GUARD) && \
@@ -158,6 +161,8 @@ static void do_boot(struct boot_rsp *rsp)
158161
__set_MSPLIM(0);
159162
#endif
160163

164+
#endif /* CONFIG_MCUBOOT_CLEANUP_ARM_CORE */
165+
161166
#ifdef CONFIG_BOOT_INTR_VEC_RELOC
162167
#if defined(CONFIG_SW_VECTOR_RELAY)
163168
_vector_table_pointer = vt;

0 commit comments

Comments
 (0)