espressif: add esp32s3 toolchain files

This brings ESP32-S3 overlays, CI and configurations.

Overlay URL:
https://github.com/espressif/xtensa-overlays/tree/master/xtensa_esp32s3
commit: a5ab689f009c89712b0e9d4a3bb06e70b2931fcf

Signed-off-by: Sylvio Alves <[email protected]>

Author: sylvioalves

.github/workflows/ci.yml

@@ -52,6 +52,7 @@ on:
         - x86_64-zephyr-elf
         - xtensa-espressif_esp32_zephyr-elf
         - xtensa-espressif_esp32s2_zephyr-elf
+        - xtensa-espressif_esp32s3_zephyr-elf
         - xtensa-intel_apl_adsp_zephyr-elf
         - xtensa-intel_s1000_zephyr-elf
         - xtensa-nxp_imx_adsp_zephyr-elf
@@ -159,6 +160,7 @@ jobs:
             x86_64-zephyr-elf)                    build_target_x86_64_zephyr_elf="y";;
             xtensa-espressif_esp32_zephyr-elf)    build_target_xtensa_espressif_esp32_zephyr_elf="y";;
             xtensa-espressif_esp32s2_zephyr-elf)  build_target_xtensa_espressif_esp32s2_zephyr_elf="y";;
+            xtensa-espressif_esp32s3_zephyr-elf)  build_target_xtensa_espressif_esp32s3_zephyr_elf="y";;
             xtensa-intel_apl_adsp_zephyr-elf)     build_target_xtensa_intel_apl_adsp_zephyr_elf="y";;
             xtensa-intel_s1000_zephyr-elf)        build_target_xtensa_intel_s1000_zephyr_elf="y";;
             xtensa-nxp_imx_adsp_zephyr-elf)       build_target_xtensa_nxp_imx_adsp_zephyr_elf="y";;
@@ -194,6 +196,7 @@ jobs:
           build_target_x86_64_zephyr_elf="y"
           build_target_xtensa_espressif_esp32_zephyr_elf="y"
           build_target_xtensa_espressif_esp32s2_zephyr_elf="y"
+          build_target_xtensa_espressif_esp32s3_zephyr_elf="y"
           build_target_xtensa_intel_apl_adsp_zephyr_elf="y"
           build_target_xtensa_intel_s1000_zephyr_elf="y"
           build_target_xtensa_nxp_imx_adsp_zephyr_elf="y"
@@ -269,6 +272,7 @@ jobs:
         [ "${build_target_x86_64_zephyr_elf}" == "y" ]                    && MATRIX_TARGETS+='"x86_64-zephyr-elf",'
         [ "${build_target_xtensa_espressif_esp32_zephyr_elf}" == "y" ]    && MATRIX_TARGETS+='"xtensa-espressif_esp32_zephyr-elf",'
         [ "${build_target_xtensa_espressif_esp32s2_zephyr_elf}" == "y" ]  && MATRIX_TARGETS+='"xtensa-espressif_esp32s2_zephyr-elf",'
+        [ "${build_target_xtensa_espressif_esp32s3_zephyr_elf}" == "y" ]  && MATRIX_TARGETS+='"xtensa-espressif_esp32s3_zephyr-elf",'
         [ "${build_target_xtensa_intel_apl_adsp_zephyr_elf}" == "y" ]     && MATRIX_TARGETS+='"xtensa-intel_apl_adsp_zephyr-elf",'
         [ "${build_target_xtensa_intel_s1000_zephyr_elf}" == "y" ]        && MATRIX_TARGETS+='"xtensa-intel_s1000_zephyr-elf",'
         [ "${build_target_xtensa_nxp_imx_adsp_zephyr_elf}" == "y" ]       && MATRIX_TARGETS+='"xtensa-nxp_imx_adsp_zephyr-elf",'
@@ -1518,6 +1522,9 @@ jobs:
             xtensa-espressif_esp32s2_zephyr-elf)
               PLATFORM_ARGS+="-p esp32s2_saola "
               ;;
+            xtensa-espressif_esp32s3_zephyr-elf)
+              PLATFORM_ARGS+="-p esp32s3_devkitc "
+              ;;
             xtensa-intel_apl_adsp_zephyr-elf)
               PLATFORM_ARGS+="-p intel_adsp_cavs15 "
               ;;

README.md

@@ -14,7 +14,8 @@ The toolchains for the following target architectures are supported:
 - RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
 - x86 (32-bit and 64-bit)
 - Xtensa (sample_controller, intel_apl_adsp, intel_s1000,
-  nxp_imx_adsp, nxp_imx8m_adsp, espressif_esp32, espressif_esp32s2)
+  nxp_imx_adsp, nxp_imx8m_adsp, espressif_esp32, espressif_esp32s2,
+  espressif_esp32s3)
 
 The following host tools are available as part of the Zephyr SDK:
 

configs/xtensa-espressif_esp32s3_zephyr-elf.config

@@ -0,0 +1,70 @@
+CT_CONFIG_VERSION="3"
+CT_EXPERIMENTAL=y
+# CT_PREFIX_DIR_RO is not set
+# CT_LOG_PROGRESS_BAR is not set
+CT_TARGET_CFLAGS="-mlongcalls -ftls-model=local-exec"
+CT_ARCH_XTENSA=y
+CT_XTENSA_CUSTOM=y
+CT_OVERLAY_NAME="espressif_esp32s3"
+CT_OVERLAY_LOCATION="./overlays"
+CT_TARGET_VENDOR="espressif_esp32s3_zephyr"
+CT_BINUTILS_SRC_CUSTOM=y
+CT_BINUTILS_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/binutils"
+CT_NEWLIB_SRC_CUSTOM=y
+CT_NEWLIB_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/newlib"
+CT_LIBC_NEWLIB_TARGET_CFLAGS="-O2"
+# CT_LIBC_NEWLIB_ENABLE_TARGET_OPTSPACE is not set
+CT_LIBC_NEWLIB_IO_C99FMT=y
+CT_LIBC_NEWLIB_IO_LL=y
+CT_LIBC_NEWLIB_IO_FLOAT=y
+# CT_LIBC_NEWLIB_FSEEK_OPTIMIZATION is not set
+CT_LIBC_NEWLIB_DISABLE_SUPPLIED_SYSCALLS=y
+CT_LIBC_NEWLIB_GLOBAL_ATEXIT=y
+CT_LIBC_NEWLIB_LITE_EXIT=y
+CT_LIBC_NEWLIB_MULTITHREAD=y
+CT_LIBC_NEWLIB_RETARGETABLE_LOCKING=y
+# CT_LIBC_NEWLIB_WIDE_ORIENT is not set
+# CT_LIBC_NEWLIB_NANO_MALLOC is not set
+# CT_LIBC_NEWLIB_NANO_FORMATTED_IO is not set
+CT_LIBC_NEWLIB_EXTRA_SECTIONS=y
+CT_GCC_SRC_CUSTOM=y
+CT_GCC_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/gcc"
+CT_CC_GCC_EXTRA_CONFIG_ARRAY="--with-gnu-ld --with-gnu-as --enable-initfini-array"
+CT_CC_GCC_CONFIG_TLS=n
+CT_CC_LANG_CXX=y
+CT_DEBUG_GDB=y
+CT_GDB_SRC_CUSTOM=y
+CT_GDB_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/gdb"
+CT_COMP_LIBS_NEWLIB_NANO=y
+CT_NEWLIB_NANO_SRC_CUSTOM=y
+CT_NEWLIB_NANO_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/newlib"
+CT_NEWLIB_NANO_GCC_LIBSTDCXX=y
+CT_NEWLIB_NANO_INSTALL_IN_TARGET=y
+# CT_LIBC_NEWLIB_NANO_IO_C99FMT is not set
+# CT_LIBC_NEWLIB_NANO_IO_LL is not set
+CT_LIBC_NEWLIB_NANO_IO_FLOAT=y
+# CT_LIBC_NEWLIB_NANO_IO_LDBL is not set
+# CT_LIBC_NEWLIB_NANO_IO_POS_ARGS is not set
+CT_LIBC_NEWLIB_NANO_FVWRITE_IN_STREAMIO=y
+# CT_LIBC_NEWLIB_NANO_UNBUF_STREAM_OPT is not set
+# CT_LIBC_NEWLIB_NANO_FSEEK_OPTIMIZATION is not set
+CT_LIBC_NEWLIB_NANO_DISABLE_SUPPLIED_SYSCALLS=y
+# CT_LIBC_NEWLIB_NANO_REGISTER_FINI is not set
+CT_LIBC_NEWLIB_NANO_ATEXIT_DYNAMIC_ALLOC=y
+CT_LIBC_NEWLIB_NANO_GLOBAL_ATEXIT=y
+CT_LIBC_NEWLIB_NANO_LITE_EXIT=y
+CT_LIBC_NEWLIB_NANO_REENT_SMALL=y
+CT_LIBC_NEWLIB_NANO_MULTITHREAD=y
+CT_LIBC_NEWLIB_NANO_RETARGETABLE_LOCKING=y
+CT_LIBC_NEWLIB_NANO_EXTRA_SECTIONS=y
+# CT_LIBC_NEWLIB_NANO_WIDE_ORIENT is not set
+CT_LIBC_NEWLIB_NANO_ENABLE_TARGET_OPTSPACE=y
+# CT_LIBC_NEWLIB_NANO_LTO is not set
+CT_LIBC_NEWLIB_NANO_NANO_MALLOC=y
+CT_LIBC_NEWLIB_NANO_NANO_FORMATTED_IO=y
+CT_COMP_LIBS_PICOLIBC=y
+CT_PICOLIBC_SRC_CUSTOM=y
+CT_PICOLIBC_CUSTOM_LOCATION="${GITHUB_WORKSPACE}/picolibc"
+CT_LIBC_PICOLIBC_GLOBAL_ATEXIT=y
+CT_LIBC_PICOLIBC_EXTRA_SECTIONS=y
+CT_LIBC_PICOLIBC_EXTRA_CONFIG_ARRAY="-Dthread-local-storage=auto -Derrno-function=zephyr -Dsysroot-install=true -Dsysroot-install-skip-checks=true"