add cfg: microchip board, targets and interface

Li-Fletch · stephanosio · commit 4d33f305bd88 · 2025-09-27T19:28:38.000+09:00
support for pix64gx curiosity, pic64gx, polarfire soc and embedded
flashpro5

Signed-off-by: Liam Fletcher &lt;liam.fletcher@microchip.com&gt;
Signed-off-by: Stephanos Ioannidis &lt;root@stephanos.io&gt;
diff --git a/meta-zephyr-sdk/recipes-hosttools/openocd/openocd_git.bb b/meta-zephyr-sdk/recipes-hosttools/openocd/openocd_git.bb
@@ -6,7 +6,7 @@ RDEPENDS_${PN} = "libusb1 hidapi"
 SRC_URI = " \
 	gitsm://github.com/zephyrproject-rtos/openocd.git;protocol=https;nobranch=1 \
 	"
-SRCREV = "b89d626c64d8674e2a8b767915e0c6fd51ac8147"
+SRCREV = "40c37a3748e5cfff3018eed45c8de6cc13c9c712"
 
 S = "${WORKDIR}/git"
 

Original file line number	Diff line number	Diff line change
`@@ -6,7 +6,7 @@ RDEPENDS_${PN} = "libusb1 hidapi"`
`6`	`6`	`SRC_URI = " \`
`7`	`7`	`gitsm://github.com/zephyrproject-rtos/openocd.git;protocol=https;nobranch=1 \`
`8`	`8`	`"`
`9`		`-SRCREV = "b89d626c64d8674e2a8b767915e0c6fd51ac8147"`
	`9`	`+SRCREV = "40c37a3748e5cfff3018eed45c8de6cc13c9c712"`
`10`	`10`
`11`	`11`	`S = "${WORKDIR}/git"`
`12`	`12`