scripts: llvm: Add RV32I multi-libs

This commit adds the following "common" RV32I multi-lib variants, based
on the list of the GCC RV32I multi-libs (gcc/config/riscv/t-zephyr):

rv32i_zicsr_zifencei/ilp32
rv32im_zicsr_zifencei/ilp32
rv32im_zicsr_zifencei_zba_zbb_zbc_zbs/ilp32
rv32imac_zicsr_zifencei/ilp32
rv32imafc_zicsr_zifencei/ilp32f
rv32imfc_zicsr_zifencei/ilp32f
rv32imafd_zicsr_zifencei/ilp32d
rv32if_zicsr_zifencei/ilp32f

Signed-off-by: Stephanos Ioannidis <[email protected]>

Author: stephanosio

scripts/llvm/CMakeLists.txt

@@ -1769,9 +1769,121 @@ add_library_variants_for_cpu(
 # RISC-V multilibs
 ## RV32I
 add_library_variants_for_cpu(
-    rv32i_zicsr_zifencei
+    rv32i_zicsr_zifencei_ilp32
     COMPILE_FLAGS "-march=rv32i_zicsr_zifencei -mabi=ilp32"
-    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_zicsr2p0_zifencei2p0 -mabi=ilp32"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32im_zicsr_zifencei_ilp32
+    COMPILE_FLAGS "-march=rv32im_zicsr_zifencei -mabi=ilp32"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0 -mabi=ilp32"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32im_zicsr_zifencei_zba_zbb_zbc_zbs_ilp32
+    COMPILE_FLAGS "-march=rv32im_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_zicsr2p0_zifencei2p0_zmmul1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0 -mabi=ilp32"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32imac_zicsr_zifencei_ilp32
+    COMPILE_FLAGS "-march=rv32imac_zicsr_zifencei -mabi=ilp32"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_a2p1_c2p0_zicsr2p0_zifencei2p0_zmmul1p0 -mabi=ilp32"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32imafc_zicsr_zifencei_ilp32f
+    COMPILE_FLAGS "-march=rv32imafc_zicsr_zifencei -mabi=ilp32f"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_a2p1_f2p2_c2p0_zicsr2p0_zifencei2p0_zmmul1p0 -mabi=ilp32f"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32imfc_zicsr_zifencei_ilp32f
+    COMPILE_FLAGS "-march=rv32imfc_zicsr_zifencei -mabi=ilp32f"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_f2p2_c2p0_zicsr2p0_zifencei2p0_zmmul1p0 -mabi=ilp32f"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32imafd_zicsr_zifencei_ilp32d
+    COMPILE_FLAGS "-march=rv32imafd_zicsr_zifencei -mabi=ilp32d"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0 -mabi=ilp32d"
+    PICOLIBC_BUILD_TYPE "release"
+    QEMU_MACHINE "none"
+    QEMU_CPU "rv32"
+    QEMU_PARAMS "-m 1G"
+    BOOT_FLASH_ADDRESS 0x00000000
+    BOOT_FLASH_SIZE 0x1000
+    FLASH_ADDRESS 0x20000000
+    FLASH_SIZE 0x1000000
+    RAM_ADDRESS 0x21000000
+    RAM_SIZE 0x1000000
+    STACK_SIZE 4K
+)
+add_library_variants_for_cpu(
+    rv32if_zicsr_zifencei_ilp32f
+    COMPILE_FLAGS "-march=rv32if_zicsr_zifencei -mabi=ilp32f"
+    MULTILIB_FLAGS "--target=riscv32-unknown-none-elf -march=rv32i2p1_f2p2_zicsr2p0_zifencei2p0 -mabi=ilp32f"
     PICOLIBC_BUILD_TYPE "release"
     QEMU_MACHINE "none"
     QEMU_CPU "rv32"

scripts/llvm/test/multilib/rv32i.test

@@ -0,0 +1,31 @@
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32i_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32I_ZICSR_ZIFENCEI_ILP32
+# RV32I_ZICSR_ZIFENCEI_ILP32: riscv32-none-elf/rv32i_zicsr_zifencei_ilp32_exn_rtti{{$}}
+# RV32I_ZICSR_ZIFENCEI_ILP32-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32im_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ILP32
+# RV32IM_ZICSR_ZIFENCEI_ILP32: riscv32-none-elf/rv32im_zicsr_zifencei_ilp32_exn_rtti{{$}}
+# RV32IM_ZICSR_ZIFENCEI_ILP32-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32im_zicsr_zifencei_zba_zbb_zbc_zbs -mabi=ilp32 | FileCheck %s --check-prefix=RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32
+# RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32: riscv32-none-elf/rv32im_zicsr_zifencei_zba_zbb_zbc_zbs_ilp32_exn_rtti{{$}}
+# RV32IM_ZICSR_ZIFENCEI_ZBA_ZBB_ZBC_ZBS_ILP32-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imac_zicsr_zifencei -mabi=ilp32 | FileCheck %s --check-prefix=RV32IMAC_ZICSR_ZIFENCEI_ILP32
+# RV32IMAC_ZICSR_ZIFENCEI_ILP32: riscv32-none-elf/rv32imac_zicsr_zifencei_ilp32_exn_rtti{{$}}
+# RV32IMAC_ZICSR_ZIFENCEI_ILP32-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imafc_zicsr_zifencei -mabi=ilp32f | FileCheck %s --check-prefix=RV32IMAFC_ZICSR_ZIFENCEI_ILP32F
+# RV32IMAFC_ZICSR_ZIFENCEI_ILP32F: riscv32-none-elf/rv32imafc_zicsr_zifencei_ilp32f_exn_rtti{{$}}
+# RV32IMAFC_ZICSR_ZIFENCEI_ILP32F-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imfc_zicsr_zifencei -mabi=ilp32f | FileCheck %s --check-prefix=RV32IMFC_ZICSR_ZIFENCEI_ILP32F
+# RV32IMFC_ZICSR_ZIFENCEI_ILP32F: riscv32-none-elf/rv32imfc_zicsr_zifencei_ilp32f_exn_rtti{{$}}
+# RV32IMFC_ZICSR_ZIFENCEI_ILP32F-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32imafd_zicsr_zifencei -mabi=ilp32d | FileCheck %s --check-prefix=RV32IMAFD_ZICSR_ZIFENCEI_ILP32D
+# RV32IMAFD_ZICSR_ZIFENCEI_ILP32D: riscv32-none-elf/rv32imafd_zicsr_zifencei_ilp32d_exn_rtti{{$}}
+# RV32IMAFD_ZICSR_ZIFENCEI_ILP32D-EMPTY:
+
+# RUN: %clang -print-multi-directory --target=riscv32-none-elf -march=rv32if_zicsr_zifencei -mabi=ilp32f | FileCheck %s --check-prefix=RV32IF_ZICSR_ZIFENCEI_ILP32F
+# RV32IF_ZICSR_ZIFENCEI_ILP32F: riscv32-none-elf/rv32if_zicsr_zifencei_ilp32f_exn_rtti{{$}}
+# RV32IF_ZICSR_ZIFENCEI_ILP32F-EMPTY: