diff --git a/bl2/CMakeLists.txt b/bl2/CMakeLists.txt index f6c2f894d0..496363ef60 100644 --- a/bl2/CMakeLists.txt +++ b/bl2/CMakeLists.txt @@ -72,6 +72,7 @@ list(APPEND BL2_CRYPTO_SRC $<${build_sha_256}:${MBEDCRYPTO_PATH}/library/sha256.c> $<${build_sha_384}:${MBEDCRYPTO_PATH}/library/sha512.c> $<$>:${MBEDCRYPTO_PATH}/library/psa_crypto_ecp.c> + $<$>:${MBEDCRYPTO_PATH}/library/psa_util.c> $<$>:${MBEDCRYPTO_PATH}/library/ecp.c> $<$>:${MBEDCRYPTO_PATH}/library/ecp_curves.c> $<$>:${MBEDCRYPTO_PATH}/library/ecdsa.c> @@ -79,6 +80,7 @@ list(APPEND BL2_CRYPTO_SRC $<$>:${MBEDCRYPTO_PATH}/library/bignum_core.c> $<$>:${MBEDCRYPTO_PATH}/library/constant_time.c> $<${is_rsa_signature}:${MBEDCRYPTO_PATH}/library/psa_crypto_rsa.c> + $<${is_rsa_signature}:${MBEDCRYPTO_PATH}/library/psa_util.c> $<${is_rsa_signature}:${MBEDCRYPTO_PATH}/library/rsa.c> $<${is_rsa_signature}:${MBEDCRYPTO_PATH}/library/rsa_alt_helpers.c> $<${is_rsa_signature}:${MBEDCRYPTO_PATH}/library/bignum.c> diff --git a/platform/ext/target/stm/common/stm32h5xx/bl2/boot_hal_bl2.c b/platform/ext/target/stm/common/stm32h5xx/bl2/boot_hal_bl2.c index 5fa11efef1..3d038414c0 100644 --- a/platform/ext/target/stm/common/stm32h5xx/bl2/boot_hal_bl2.c +++ b/platform/ext/target/stm/common/stm32h5xx/bl2/boot_hal_bl2.c @@ -384,8 +384,9 @@ void boot_platform_start_next_image(struct boot_arm_vector_table *vector) #ifdef BL2_DATA TFM_BL2_CopySharedData(); #endif +#ifdef CRYPTO_HW_ACCELERATOR (void)crypto_hw_accelerator_finish(); - +#endif RNG_DeInit(); @@ -596,10 +597,12 @@ int32_t boot_platform_init(void) BOOT_LOG_ERR("Error while initializing RNG Ip"); Error_Handler(); } +#ifdef CRYPTO_HW_ACCELERATOR if (crypto_hw_accelerator_init()){ BOOT_LOG_ERR("Error while initializing HW accelerator Ip"); Error_Handler(); } +#endif /* Start HW randomization */ fih_delay_init(); /* Apply Run time Protection */ diff --git a/platform/ext/target/stm/common/stm32h5xx/secure/target_cfg.c b/platform/ext/target/stm/common/stm32h5xx/secure/target_cfg.c index 1482884ce8..a7112f7073 100644 --- a/platform/ext/target/stm/common/stm32h5xx/secure/target_cfg.c +++ b/platform/ext/target/stm/common/stm32h5xx/secure/target_cfg.c @@ -477,7 +477,17 @@ static void gtzc_internal_flash_priv(uint32_t offset_start, uint32_t offset_end) void gtzc_init_cfg(void) { +#if (defined (MBEDTLS_SHA256_C) && defined (MBEDTLS_SHA256_ALT)) \ + || (defined (MBEDTLS_SHA1_C) && defined (MBEDTLS_SHA1_ALT)) \ + || (defined (MBEDTLS_MD5_C) && defined (MBEDTLS_MD5_ALT)) \ + || (defined (MBEDTLS_ECP_C) && defined (MBEDTLS_ECP_ALT)) \ + || (defined (MBEDTLS_ECDSA_C) && (defined (MBEDTLS_ECDSA_SIGN_ALT) || defined (MBEDTLS_ECDSA_VERIFY_ALT))) \ + || (defined (MBEDTLS_AES_C) && defined (MBEDTLS_AES_ALT)) \ + || (defined (MBEDTLS_GCM_C) && defined (MBEDTLS_GCM_ALT)) \ + || (defined (MBEDTLS_CCM_C) && defined (MBEDTLS_CCM_ALT)) \ + || defined (HW_CRYPTO_DPA_AES) || defined (HW_CRYPTO_DPA_GCM) uint32_t gtzc_periph_att; +#endif if (uFlowStage == FLOW_STAGE_CFG) { @@ -487,7 +497,7 @@ void gtzc_init_cfg(void) FLOW_CONTROL_STEP(uFlowProtectValue, FLOW_STEP_GTZC_VTOR_LCK, FLOW_CTRL_GTZC_VTOR_LCK); /* Check PRIS Is enabled */ - if(SCB->AIRCR & SCB_AIRCR_PRIS_Msk == 0) + if((SCB->AIRCR & SCB_AIRCR_PRIS_Msk) == 0) Error_Handler(); FLOW_CONTROL_STEP(uFlowProtectValue, FLOW_STEP_GTZC_PRIS_EN, FLOW_CTRL_GTZC_PRIS_EN); diff --git a/platform/ext/target/stm/common/stm32h5xx/secure/tfm_hal_isolation.c b/platform/ext/target/stm/common/stm32h5xx/secure/tfm_hal_isolation.c index b22a89225a..8340390c61 100644 --- a/platform/ext/target/stm/common/stm32h5xx/secure/tfm_hal_isolation.c +++ b/platform/ext/target/stm/common/stm32h5xx/secure/tfm_hal_isolation.c @@ -421,8 +421,8 @@ FIH_RET_TYPE(enum tfm_hal_status_t) tfm_hal_bind_boundary( bool ns_agent; uint32_t partition_attrs = 0; const struct asset_desc_t *p_asset; - struct platform_data_t *plat_data_ptr; #if TFM_ISOLATION_LEVEL == 2 + struct platform_data_t *plat_data_ptr; struct mpu_armv8m_region_cfg_t localcfg; #endif diff --git a/platform/ext/target/stm/common/stm32u5xx/bl2/boot_hal_bl2.c b/platform/ext/target/stm/common/stm32u5xx/bl2/boot_hal_bl2.c index c7340ea5e7..7246f95f39 100644 --- a/platform/ext/target/stm/common/stm32u5xx/bl2/boot_hal_bl2.c +++ b/platform/ext/target/stm/common/stm32u5xx/bl2/boot_hal_bl2.c @@ -400,8 +400,9 @@ void boot_platform_start_next_image(struct boot_arm_vector_table *vector) #ifdef BL2_DATA TFM_BL2_CopySharedData(); #endif +#ifdef CRYPTO_HW_ACCELERATOR (void)crypto_hw_accelerator_finish(); - +#endif RNG_DeInit(); @@ -612,10 +613,12 @@ int32_t boot_platform_init(void) BOOT_LOG_ERR("Error while initializing RNG Ip"); Error_Handler(); } +#ifdef CRYPTO_HW_ACCELERATOR if (crypto_hw_accelerator_init()){ BOOT_LOG_ERR("Error while initializing HW accelerator Ip"); Error_Handler(); } +#endif /* Start HW randomization */ fih_delay_init(); /* Apply Run time Protection */