|
42 | 42 | <0x0087500 0x0f>,
|
43 | 43 | <0x0087510 0x01>,
|
44 | 44 | <0x0087514 0x01>;
|
45 |
| - reg-names = "IR", "IER", "IPR", "FIR", "IRQCR","IRQFLTE","IRQFLTC0"; |
| 45 | + reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE", "IRQFLTC0"; |
46 | 46 |
|
47 | 47 | swint1: swint1@872e0 {
|
48 | 48 | compatible = "renesas,rx-swint";
|
|
227 | 227 | status = "disabled";
|
228 | 228 | };
|
229 | 229 |
|
230 |
| - port_irq7: external-interrupt@87507 { |
| 230 | + port_irq7: external-interrupt@87507 { |
231 | 231 | compatible = "renesas,rx-external-interrupt";
|
232 | 232 | reg = <0x00087507 0x1>;
|
233 | 233 | interrupts = <71 12>;
|
|
270 | 270 | reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "ODR1", "PCR", "DSCR";
|
271 | 271 | pinmux = <&pinmux1>;
|
272 | 272 | port-irqs = <&port_irq2 &port_irq3 &port_irq4
|
273 |
| - &port_irq5 &port_irq6 &port_irq7>; |
| 273 | + &port_irq5 &port_irq6 &port_irq7>; |
274 | 274 | port-irq-names = "port-irq2",
|
275 | 275 | "port-irq3",
|
276 | 276 | "port-irq4",
|
|
449 | 449 | reg-names = "PDR", "PODR", "PIDR", "PMR", "ODR0", "PCR", "DSCR";
|
450 | 450 | pinmux = <&pinmuxd>;
|
451 | 451 | port-irqs = <&port_irq0 &port_irq1 &port_irq2
|
452 |
| - &port_irq3 &port_irq4 &port_irq5 |
453 |
| - &port_irq6 &port_irq7>; |
| 452 | + &port_irq3 &port_irq4 &port_irq5 |
| 453 | + &port_irq6 &port_irq7>; |
454 | 454 | port-irq-names = "port-irq0",
|
455 | 455 | "port-irq1",
|
456 | 456 | "port-irq2",
|
|
625 | 625 | interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
|
626 | 626 | clocks = <&pclkb MSTPA 9>;
|
627 | 627 | reg-names = "TCR", "TMDR", "TIOR", "TIER",
|
628 |
| - "TSR", "TGR", "TCNT", "NFCR"; |
629 |
| - reg = <0x00088700 0x01>, |
630 |
| - <0x00088701 0x01>, |
631 |
| - <0x00088702 0x02>, |
632 |
| - <0x00088704 0x01>, |
633 |
| - <0x00088705 0x01>, |
634 |
| - <0x00088708 0x8>, |
635 |
| - <0x00088706 0x02>, |
636 |
| - <0x00088690 0x01>; |
| 628 | + "TSR", "TGR", "TCNT", "NFCR"; |
| 629 | + reg = <0x00088700 0x01>, |
| 630 | + <0x00088701 0x01>, |
| 631 | + <0x00088702 0x02>, |
| 632 | + <0x00088704 0x01>, |
| 633 | + <0x00088705 0x01>, |
| 634 | + <0x00088708 0x8>, |
| 635 | + <0x00088706 0x02>, |
| 636 | + <0x00088690 0x01>; |
637 | 637 | bit-idx = <0>;
|
638 | 638 |
|
639 | 639 | pwm {
|
|
650 | 650 | interrupts = <121 1>, <122 1>, <123 1>;
|
651 | 651 | interrupt-names = "tgia", "tgib", "tgiv";
|
652 | 652 | clocks = <&pclkb MSTPA 9>;
|
653 |
| - reg = <0x00088780 0x01>, |
654 |
| - <0x00088781 0x01>, |
655 |
| - <0x00088782 0x01>, |
656 |
| - <0x00088784 0x01>, |
657 |
| - <0x00088785 0x01>, |
658 |
| - <0x00088788 0x4>, |
659 |
| - <0x00088786 0x02>, |
660 |
| - <0x00088691 0x01>; |
| 653 | + reg = <0x00088780 0x01>, |
| 654 | + <0x00088781 0x01>, |
| 655 | + <0x00088782 0x01>, |
| 656 | + <0x00088784 0x01>, |
| 657 | + <0x00088785 0x01>, |
| 658 | + <0x00088788 0x4>, |
| 659 | + <0x00088786 0x02>, |
| 660 | + <0x00088691 0x01>; |
661 | 661 | reg-names = "TCR", "TMDR", "TIOR", "TIER",
|
662 |
| - "TSR", "TGR", "TCNT", "NFCR"; |
| 662 | + "TSR", "TGR", "TCNT", "NFCR"; |
663 | 663 | bit-idx = <1>;
|
664 | 664 |
|
665 | 665 | pwm {
|
|
676 | 676 | interrupts = <125 1>, <126 1>, <127 1>;
|
677 | 677 | interrupt-names = "tgia", "tgib", "tgiv";
|
678 | 678 | clocks = <&pclkb MSTPA 9>;
|
679 |
| - reg = <0x00088800 0x01>, |
680 |
| - <0x00088801 0x01>, |
681 |
| - <0x00088802 0x01>, |
682 |
| - <0x00088804 0x01>, |
683 |
| - <0x00088805 0x01>, |
684 |
| - <0x00088808 0x4>, |
685 |
| - <0x00088806 0x02>, |
686 |
| - <0x00088692 0x01>; |
| 679 | + reg = <0x00088800 0x01>, |
| 680 | + <0x00088801 0x01>, |
| 681 | + <0x00088802 0x01>, |
| 682 | + <0x00088804 0x01>, |
| 683 | + <0x00088805 0x01>, |
| 684 | + <0x00088808 0x4>, |
| 685 | + <0x00088806 0x02>, |
| 686 | + <0x00088692 0x01>; |
687 | 687 | reg-names = "TCR", "TMDR", "TIOR", "TIER",
|
688 |
| - "TSR", "TGR", "TCNT", "NFCR"; |
| 688 | + "TSR", "TGR", "TCNT", "NFCR"; |
689 | 689 | bit-idx = <2>;
|
690 | 690 |
|
691 | 691 | pwm {
|
|
702 | 702 | interrupts = <129 1>, <130 1>, <131 1>, <132 1>, <133 1>;
|
703 | 703 | interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
|
704 | 704 | clocks = <&pclkb MSTPA 9>;
|
705 |
| - reg = <0x00088600 0x01>, |
706 |
| - <0x00088602 0x01>, |
707 |
| - <0x00088604 0x02>, |
708 |
| - <0x00088608 0x01>, |
709 |
| - <0x0008862c 0x1>, |
710 |
| - <0x00088618 0x8>, |
711 |
| - <0x00088610 0x02>, |
712 |
| - <0x00088693 0x01>; |
| 705 | + reg = <0x00088600 0x01>, |
| 706 | + <0x00088602 0x01>, |
| 707 | + <0x00088604 0x02>, |
| 708 | + <0x00088608 0x01>, |
| 709 | + <0x0008862c 0x1>, |
| 710 | + <0x00088618 0x8>, |
| 711 | + <0x00088610 0x02>, |
| 712 | + <0x00088693 0x01>; |
713 | 713 | reg-names = "TCR", "TMDR", "TIOR", "TIER",
|
714 |
| - "TSR", "TGR", "TCNT", "NFCR"; |
| 714 | + "TSR", "TGR", "TCNT", "NFCR"; |
715 | 715 | bit-idx = <6>;
|
716 | 716 |
|
717 | 717 | pwm {
|
|
728 | 728 | interrupts = <134 1>, <135 1>, <136 1>, <137 1>, <138 1>;
|
729 | 729 | interrupt-names = "tgia", "tgib", "tgic", "tgid", "tgiv";
|
730 | 730 | clocks = <&pclkb MSTPA 9>;
|
731 |
| - reg = <0x00088601 0x01>, |
732 |
| - <0x00088603 0x01>, |
733 |
| - <0x00088606 0x02>, |
734 |
| - <0x00088609 0x01>, |
735 |
| - <0x0008862c 0x1>, |
736 |
| - <0x0008861c 0x8>, |
737 |
| - <0x00088612 0x02>, |
738 |
| - <0x00088694 0x01>; |
| 731 | + reg = <0x00088601 0x01>, |
| 732 | + <0x00088603 0x01>, |
| 733 | + <0x00088606 0x02>, |
| 734 | + <0x00088609 0x01>, |
| 735 | + <0x0008862c 0x1>, |
| 736 | + <0x0008861c 0x8>, |
| 737 | + <0x00088612 0x02>, |
| 738 | + <0x00088694 0x01>; |
739 | 739 | reg-names = "TCR", "TMDR", "TIOR", "TIER",
|
740 |
| - "TSR", "TGR", "TCNT", "NFCR"; |
| 740 | + "TSR", "TGR", "TCNT", "NFCR"; |
741 | 741 | bit-idx = <7>;
|
742 | 742 |
|
743 | 743 | pwm {
|
|
823 | 823 |
|
824 | 824 | adc: adc@89000 {
|
825 | 825 | compatible = "renesas,rx-adc";
|
826 |
| - interrupts= <102 1>; |
| 826 | + interrupts = <102 1>; |
827 | 827 | interrupt-names = "s12adi0";
|
828 | 828 | reg = <0x00089000 0x100>;
|
829 | 829 | #io-channel-cells = <1>;
|
|
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