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tests: drivers: spi: Add support spi_controller_peripheral for RA
Add support test app support spi_controller_peripheral for Renesas RA boards: ek_ra6m5, ek_ra6m4, ek_ra6m3, ek_ra6m2, ek_ra6m1, ek_ra6e2, fpb_ra6e2, ek_ra4m1, ek_ra2a1 Signed-off-by: Khoa Nguyen <[email protected]>
1 parent 3aace95 commit 291860e

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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SPI_INTERRUPT=y
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CONFIG_SPI_RA_DTC=y
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CONFIG_TESTED_SPI_MODE=1
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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spi0_default_alt: spi0_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 3, 4)>,
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<RA_PSEL(RA_PSEL_SPI, 3, 3)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 11)>;
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};
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};
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spi1_default_alt: spi1_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 2, 5)>,
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<RA_PSEL(RA_PSEL_SPI, 2, 4)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 3)>;
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};
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};
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};
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&spi0 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi0_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport1 12 GPIO_ACTIVE_LOW>;
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interrupts = <24 1>, <25 1>, <26 1>, <27 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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dut_spis: &spi1 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi1_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport2 6 GPIO_ACTIVE_LOW>;
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};
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SPI_INTERRUPT=y
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CONFIG_SPI_RA_DTC=y
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CONFIG_TESTED_SPI_MODE=1
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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spi0_default_alt: spi0_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 4, 10)>,
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<RA_PSEL(RA_PSEL_SPI, 4, 11)>,
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<RA_PSEL(RA_PSEL_SPI, 4, 12)>;
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};
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};
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spi1_default_alt: spi1_default_alt {
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group1 {
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/* MISO MOSI RSPCK SSL */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 10)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 9)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 11)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 8)>;
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};
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};
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};
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&spi0 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi0_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport4 13 GPIO_ACTIVE_LOW>;
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interrupts = <23 1>, <24 1>, <25 1>, <26 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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dut_spis: &spi1 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi1_default_alt>;
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pinctrl-names = "default";
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};
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SPI_INTERRUPT=y
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CONFIG_SPI_RA_DTC=y
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CONFIG_TESTED_SPI_MODE=1
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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spi0_default_alt: spi0_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 2, 6)>,
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<RA_PSEL(RA_PSEL_SPI, 2, 7)>,
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<RA_PSEL(RA_PSEL_SPI, 3, 2)>;
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};
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};
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spi1_default_alt: spi1_default_alt {
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group1 {
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/* MISO MOSI RSPCK SSL */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 0)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 1)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 2)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 3)>;
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};
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};
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};
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&ioport1 {
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status = "okay";
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};
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&spi0 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi0_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport3 1 GPIO_ACTIVE_LOW>;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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dut_spis: &spi1 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi1_default_alt>;
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pinctrl-names = "default";
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};
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SPI_INTERRUPT=y
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CONFIG_SPI_RA_DTC=y
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CONFIG_TESTED_SPI_MODE=1
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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spi0_default_alt: spi0_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 0)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 1)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 2)>;
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};
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};
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spi1_default_alt: spi1_default_alt {
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group1 {
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/* MISO MOSI RSPCK SSL */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 10)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 9)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 11)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 8)>;
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};
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};
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};
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&ioport1 {
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status = "okay";
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};
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&spi0 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi0_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport1 3 GPIO_ACTIVE_LOW>;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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dut_spis: &spi1 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi1_default_alt>;
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pinctrl-names = "default";
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interrupts = <92 1>, <93 1>, <94 1>, <95 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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};
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SPI_INTERRUPT=y
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CONFIG_SPI_RA_DTC=y
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CONFIG_TESTED_SPI_MODE=1
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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spi0_default_alt: spi0_default_alt {
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group1 {
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/* MISO MOSI RSPCK */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 0)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 1)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 2)>;
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};
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};
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spi1_default_alt: spi1_default_alt {
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group1 {
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/* MISO MOSI RSPCK SSL */
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psels = <RA_PSEL(RA_PSEL_SPI, 1, 10)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 9)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 11)>,
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<RA_PSEL(RA_PSEL_SPI, 1, 8)>;
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};
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};
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};
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&ioport1 {
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status = "okay";
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};
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&spi0 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi0_default_alt>;
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pinctrl-names = "default";
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cs-gpios = <&ioport1 3 GPIO_ACTIVE_LOW>;
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dut_spi_dt: test-spi-dev@0 {
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compatible = "vnd,spi-device";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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dut_spis: &spi1 {
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rx-dtc;
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tx-dtc;
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status = "okay";
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pinctrl-0 = <&spi1_default_alt>;
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pinctrl-names = "default";
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interrupts = <92 1>, <93 1>, <94 1>, <95 1>;
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interrupt-names = "rxi", "txi", "tei", "eri";
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};

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