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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER (uart_ifx_cat1 , CONFIG_UART_LOG_LEVEL );
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+ #if (CONFIG_SOC_FAMILY_INFINEON_CAT1C )
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+ extern void cyhal_uart_irq_handler (cyhal_uart_t * cyhal_uart_irq_obj );
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+ #endif
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+
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#ifdef CONFIG_UART_ASYNC_API
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#include <zephyr/drivers/dma.h>
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#include <cyhal_dma.h>
@@ -84,6 +88,9 @@ struct ifx_cat1_uart_config {
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const struct pinctrl_dev_config * pcfg ;
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CySCB_Type * reg_addr ;
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struct uart_config dt_cfg ;
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+ #if (CONFIG_SOC_FAMILY_INFINEON_CAT1C )
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+ uint16_t irq_num ;
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+ #endif
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uint8_t irq_priority ;
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};
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@@ -355,7 +362,7 @@ static void ifx_cat1_uart_irq_tx_enable(const struct device *dev)
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const struct ifx_cat1_uart_config * const config = dev -> config ;
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cyhal_uart_enable_event (& data -> obj , (cyhal_uart_event_t )CYHAL_UART_IRQ_TX_EMPTY ,
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- config -> irq_priority , 1 );
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+ config -> irq_priority , true );
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}
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/* Disable TX interrupt */
@@ -365,7 +372,7 @@ static void ifx_cat1_uart_irq_tx_disable(const struct device *dev)
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const struct ifx_cat1_uart_config * const config = dev -> config ;
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cyhal_uart_enable_event (& data -> obj , (cyhal_uart_event_t )CYHAL_UART_IRQ_TX_EMPTY ,
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- config -> irq_priority , 0 );
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+ config -> irq_priority , false );
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}
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/* Check if UART TX buffer can accept a new char */
@@ -392,7 +399,7 @@ static void ifx_cat1_uart_irq_rx_enable(const struct device *dev)
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const struct ifx_cat1_uart_config * const config = dev -> config ;
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cyhal_uart_enable_event (& data -> obj , (cyhal_uart_event_t )CYHAL_UART_IRQ_RX_NOT_EMPTY ,
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- config -> irq_priority , 1 );
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+ config -> irq_priority , true );
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}
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/* Disable TX interrupt */
@@ -402,7 +409,7 @@ static void ifx_cat1_uart_irq_rx_disable(const struct device *dev)
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const struct ifx_cat1_uart_config * const config = dev -> config ;
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cyhal_uart_enable_event (& data -> obj , (cyhal_uart_event_t )CYHAL_UART_IRQ_RX_NOT_EMPTY ,
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- config -> irq_priority , 0 );
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+ config -> irq_priority , false );
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}
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/* Check if UART RX buffer has a received char */
@@ -421,7 +428,7 @@ static void ifx_cat1_uart_irq_err_enable(const struct device *dev)
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cyhal_uart_enable_event (
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& data -> obj , (cyhal_uart_event_t )(CYHAL_UART_IRQ_TX_ERROR | CYHAL_UART_IRQ_RX_ERROR ),
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- config -> irq_priority , 1 );
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+ config -> irq_priority , true );
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}
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/* Disable Error interrupts */
@@ -432,7 +439,7 @@ static void ifx_cat1_uart_irq_err_disable(const struct device *dev)
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cyhal_uart_enable_event (
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& data -> obj , (cyhal_uart_event_t )(CYHAL_UART_IRQ_TX_ERROR | CYHAL_UART_IRQ_RX_ERROR ),
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- config -> irq_priority , 0 );
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+ config -> irq_priority , false );
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}
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/* Check if any IRQs is pending */
@@ -968,6 +975,12 @@ static int ifx_cat1_uart_init(const struct device *dev)
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return - ENOTSUP ;
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}
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+ #if (CONFIG_SOC_FAMILY_INFINEON_CAT1C && CONFIG_UART_INTERRUPT_DRIVEN )
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+ /* Enable the UART interrupt */
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+ enable_sys_int (config -> irq_num , config -> irq_priority ,
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+ (void (* )(const void * ))(void * )cyhal_uart_irq_handler , & data -> obj );
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+ #endif
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+
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/* Perform initial Uart configuration */
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data -> obj .is_clock_owned = true;
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ret = ifx_cat1_uart_configure (dev , & config -> dt_cfg );
@@ -1102,6 +1115,14 @@ static DEVICE_API(uart, ifx_cat1_uart_driver_api) = {
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#define UART_DMA_CHANNEL (index , dir , ch_dir , src_data_size , dst_data_size )
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#endif /* CONFIG_UART_ASYNC_API */
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+ #if (CONFIG_SOC_FAMILY_INFINEON_CAT1C )
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+ #define IRQ_INFO (n ) \
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+ .irq_num = DT_INST_PROP_BY_IDX(n, system_interrupts, SYS_INT_NUM), \
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+ .irq_priority = DT_INST_PROP_BY_IDX(n, system_interrupts, SYS_INT_PRI)};
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+ #else
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+ #define IRQ_INFO (n ) .irq_priority = DT_INST_IRQ(n, priority)};
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+ #endif
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+
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#define INFINEON_CAT1_UART_INIT (n ) \
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PINCTRL_DT_INST_DEFINE(n); \
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static struct ifx_cat1_uart_data ifx_cat1_uart##n##_data = { \
@@ -1110,13 +1131,13 @@ static DEVICE_API(uart, ifx_cat1_uart_driver_api) = {
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\
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static struct ifx_cat1_uart_config ifx_cat1_uart##n##_cfg = { \
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.dt_cfg.baudrate = DT_INST_PROP(n, current_speed), \
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- .dt_cfg.parity = DT_INST_ENUM_IDX(n, parity), \
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- .dt_cfg.stop_bits = DT_INST_ENUM_IDX(n, stop_bits), \
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- .dt_cfg.data_bits = DT_INST_ENUM_IDX(n, data_bits), \
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+ .dt_cfg.parity = DT_INST_ENUM_IDX(n, parity), \
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+ .dt_cfg.stop_bits = DT_INST_ENUM_IDX(n, stop_bits), \
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+ .dt_cfg.data_bits = DT_INST_ENUM_IDX(n, data_bits), \
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.dt_cfg.flow_ctrl = DT_INST_PROP(n, hw_flow_control), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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.reg_addr = (CySCB_Type *)DT_INST_REG_ADDR(n), \
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- .irq_priority = DT_INST_IRQ(n, priority)}; \
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+ IRQ_INFO(n) \
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\
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DEVICE_DT_INST_DEFINE(n, &ifx_cat1_uart_init, NULL, &ifx_cat1_uart##n##_data, \
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&ifx_cat1_uart##n##_cfg, PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, \
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