dts: arm: sifli: sf32lb52x: define mpi1/2

MPI1/2 are memory controllers (PSRAM, NOR, NAND, etc.).

Signed-off-by: Gerard Marull-Paretas <[email protected]>

Author: gmarull

dts/arm/sifli/sf32lb52x.dtsi

@@ -92,6 +92,24 @@
 			status = "disabled";
 		};
 
+		mpi1: memory-controller@50041000 {
+			compatible = "sifli,sf32lb-mpi";
+			reg = <0x50041000 0x1000>;
+			clocks = <&rcc_clk SF32LB52X_CLOCK_MPI1>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
+
+		mpi2: memory-controller@50042000 {
+			compatible = "sifli,sf32lb-mpi";
+			reg = <0x50042000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clocks = <&rcc_clk SF32LB52X_CLOCK_MPI2>;
+			status = "disabled";
+		};
+
 		usart1: serial@50084000 {
 			compatible = "sifli,sf32lb-usart";
 			reg = <0x50084000 0x400>;