devicetree: format files in dts/xtensa/espressif

kylebonnici · nashif · commit e1b842bed784 · 2025-09-12T19:23:13.000-04:00
Applying dts-linter results for files in

dts/xtensa/espressif

Signed-off-by: Kyle Micallef Bonnici &lt;kylebonnici@hotmail.com&gt;
diff --git a/dts/xtensa/espressif/esp32/esp32_common.dtsi b/dts/xtensa/espressif/esp32/esp32_common.dtsi
@@ -160,9 +160,8 @@
 			status = "disabled";
 			shared-memory = <&ipmmem0>;
 			shared-memory-size = <0x400>;
-			interrupts =
-				<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
-				<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupts = <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
 			interrupt-parent = <&intc>;
 		};
 
@@ -172,9 +171,8 @@
 			status = "disabled";
 			shared-memory = <&ipmmem0>;
 			shared-memory-size = <0x400>;
-			interrupts =
-				<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
-				<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupts = <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
 			interrupt-parent = <&intc>;
 			#mbox-cells = <1>;
 		};
@@ -293,10 +291,8 @@
 			compatible = "simple-bus";
 			gpio-map-mask = <0xffffffe0 0xffffffc0>;
 			gpio-map-pass-thru = <0x1f 0x3f>;
-			gpio-map = <
-				0x00 0x0 &gpio0 0x0 0x0
-				0x20 0x0 &gpio1 0x0 0x0
-			>;
+			gpio-map = <0x00 0x0 &gpio0 0x0 0x0
+				    0x20 0x0 &gpio1 0x0 0x0>;
 			#gpio-cells = <2>;
 			#address-cells = <1>;
 			#size-cells = <1>;
diff --git a/dts/xtensa/espressif/esp32/esp32_d0wdr2_v3.dtsi b/dts/xtensa/espressif/esp32/esp32_d0wdr2_v3.dtsi
@@ -8,9 +8,9 @@
 
 /* Reserved GPIO pins */
 &gpio0 {
-	gpio-reserved-ranges =	<6 5>, // embeddef psram
-				<11 1>,	// flash CS
-				<20 1>, <24 1>, <28 4>; // NC
+	gpio-reserved-ranges = <6 5>, // embeddef psram
+			       <11 1>,	// flash CS
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 /* 2MB psram */
diff --git a/dts/xtensa/espressif/esp32/esp32_pico_d4.dtsi b/dts/xtensa/espressif/esp32/esp32_pico_d4.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 3>, <11 1>, <16 2>, // embedded flash
-				<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 /* 4MB flash */
diff --git a/dts/xtensa/espressif/esp32/esp32_pico_v3.dtsi b/dts/xtensa/espressif/esp32/esp32_pico_v3.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <16 3>, <23 1>,	// limitations
-				<24 1>, <28 4>;	// NC
+			       <24 1>, <28 4>;	// NC
 };
 
 /* 4MB flash */
diff --git a/dts/xtensa/espressif/esp32/esp32_pico_v3_02.dtsi b/dts/xtensa/espressif/esp32/esp32_pico_v3_02.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, // flash
-			<24 2>, <28 4>; // NC
+			       <24 2>, <28 4>; // NC
 };
 
 /* 8MB flash */
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n16.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n16.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, // flash
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n4.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n4.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, // flash
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n8.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_32ue_n8.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>,	// flash
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_da_n16.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_da_n16.dtsi
@@ -9,8 +9,8 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <2 1>, <25 1>, // NC/test
-				<6 6>, // flash
-				<20 1>, <24 1>, <28 4>; // NC
+			       <6 6>, // flash
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_da_n4.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_da_n4.dtsi
@@ -9,8 +9,8 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <2 1>, <25 1>, // NC/test
-				<6 6>, // flash
-				<20 1>, <24 1>, <28 4>; // NC
+			       <6 6>, // flash
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wroom_da_n8.dtsi b/dts/xtensa/espressif/esp32/esp32_wroom_da_n8.dtsi
@@ -9,8 +9,8 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <2 1>, <25 1>, // NC/test
-				<6 6>, // flash
-				<20 1>, <24 1>, <28 4>; // NC
+			       <6 6>, // flash
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r2.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r2.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r4.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r4.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r8.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n16r8.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n4r2.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n4r2.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n4r8.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n4r8.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n8r2.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n8r2.dtsi
@@ -9,7 +9,7 @@
 /* Reserved GPIO pins */
 &gpio0 {
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32/esp32_wrover_e_n8r8.dtsi b/dts/xtensa/espressif/esp32/esp32_wrover_e_n8r8.dtsi
@@ -10,7 +10,7 @@
 &gpio0 {
 	gpio-reserved-ranges = <20 1>, <24 1>, <28 4>;
 	gpio-reserved-ranges = <6 6>, <16 2>,  // flash&psram
-			<20 1>, <24 1>, <28 4>; // NC
+			       <20 1>, <24 1>, <28 4>; // NC
 };
 
 &gpio1 {
diff --git a/dts/xtensa/espressif/esp32s2/esp32s2_common.dtsi b/dts/xtensa/espressif/esp32s2/esp32s2_common.dtsi
@@ -80,6 +80,7 @@
 		#clock-cells = <1>;
 		status = "okay";
 	};
+
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -423,5 +424,4 @@
 			status = "disabled";
 		};
 	};
-
 };
diff --git a/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi b/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
@@ -14,7 +14,6 @@
 #include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
 
 / {
-
 	aliases {
 		die-temp0 = &coretemp;
 	};
@@ -145,9 +144,8 @@
 			status = "disabled";
 			shared-memory = <&ipmmem0>;
 			shared-memory-size = <0x400>;
-			interrupts =
-				<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
-				<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupts = <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
 			interrupt-parent = <&intc>;
 		};
 
@@ -157,9 +155,8 @@
 			status = "disabled";
 			shared-memory = <&ipmmem0>;
 			shared-memory-size = <0x400>;
-			interrupts =
-				<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
-				<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
+			interrupts = <FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
+				     <FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
 			interrupt-parent = <&intc>;
 			#mbox-cells = <1>;
 		};
@@ -236,10 +233,8 @@
 			compatible = "simple-bus";
 			gpio-map-mask = <0xffffffe0 0xffffffc0>;
 			gpio-map-pass-thru = <0x1f 0x3f>;
-			gpio-map = <
-				0x00 0x0 &gpio0 0x0 0x0
-				0x20 0x0 &gpio1 0x0 0x0
-			>;
+			gpio-map = <0x00 0x0 &gpio0 0x0 0x0
+				    0x20 0x0 &gpio1 0x0 0x0>;
 			#gpio-cells = <2>;
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -531,17 +526,26 @@
 			compatible = "espressif,esp32-gdma";
 			reg = <0x6003f000 DT_SIZE_K(4)>;
 			#dma-cells = <1>;
-			interrupts =
-				<DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_OUT_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_IN_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_OUT_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_IN_CH3_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_OUT_CH3_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_IN_CH4_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>,
-				<DMA_OUT_CH4_INTR_SOURCE IRQ_DEFAULT_PRIORITY ESP_INTR_FLAG_SHARED>;
+			interrupts = <DMA_IN_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_OUT_CH0_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_IN_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_OUT_CH1_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_IN_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_OUT_CH2_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_IN_CH3_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_OUT_CH3_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_IN_CH4_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>,
+				     <DMA_OUT_CH4_INTR_SOURCE IRQ_DEFAULT_PRIORITY
+				      ESP_INTR_FLAG_SHARED>;
 			interrupt-parent = <&intc>;
 			clocks = <&clock ESP32_GDMA_MODULE>;
 			dma-channels = <10>;
