@@ -73,12 +73,6 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
7373#define IS_ETH_DMATXDESC_OWN (dma_tx_desc ) (dma_tx_desc->DESC3 & \
7474 ETH_DMATXNDESCRF_OWN)
7575
76- #define ETH_RXBUFNB ETH_RX_DESC_CNT
77- #define ETH_TXBUFNB ETH_TX_DESC_CNT
78-
79- #define ETH_MEDIA_INTERFACE_MII HAL_ETH_MII_MODE
80- #define ETH_MEDIA_INTERFACE_RMII HAL_ETH_RMII_MODE
81-
8276/* Only one tx_buffer is sufficient to pass only 1 dma_buffer */
8377#define ETH_TXBUF_DEF_NB 1U
8478#else
@@ -105,14 +99,14 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
10599#define __eth_stm32_buf __aligned(4)
106100#endif
107101
108- static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RXBUFNB ] __eth_stm32_desc ;
109- static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TXBUFNB ] __eth_stm32_desc ;
110- static uint8_t dma_rx_buffer [ETH_RXBUFNB ][ ETH_STM32_RX_BUF_SIZE ] __eth_stm32_buf ;
111- static uint8_t dma_tx_buffer [ETH_TXBUFNB ][ ETH_STM32_TX_BUF_SIZE ] __eth_stm32_buf ;
102+ static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RX_DESC_CNT ] __eth_stm32_desc ;
103+ static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TX_DESC_CNT ] __eth_stm32_desc ;
104+ static uint8_t dma_rx_buffer [ETH_RX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
105+ static uint8_t dma_tx_buffer [ETH_TX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
112106
113107#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
114108
115- BUILD_ASSERT (ETH_STM32_RX_BUF_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
109+ BUILD_ASSERT (ETH_MAX_PACKET_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
116110
117111struct eth_stm32_rx_buffer_header {
118112 struct eth_stm32_rx_buffer_header * next ;
@@ -130,12 +124,12 @@ struct eth_stm32_tx_context {
130124 uint16_t first_tx_buffer_index ;
131125};
132126
133- static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RXBUFNB ];
134- static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TXBUFNB ];
127+ static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RX_DESC_CNT ];
128+ static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TX_DESC_CNT ];
135129
136130void HAL_ETH_RxAllocateCallback (uint8_t * * buf )
137131{
138- for (size_t i = 0 ; i < ETH_RXBUFNB ; ++ i ) {
132+ for (size_t i = 0 ; i < ETH_RX_DESC_CNT ; ++ i ) {
139133 if (!dma_rx_buffer_header [i ].used ) {
140134 dma_rx_buffer_header [i ].next = NULL ;
141135 dma_rx_buffer_header [i ].size = 0 ;
@@ -147,8 +141,8 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buf)
147141 * buf = NULL ;
148142}
149143
150- /* Pointer to an array of ETH_STM32_RX_BUF_SIZE uint8_t's */
151- typedef uint8_t (* RxBufferPtr )[ETH_STM32_RX_BUF_SIZE ];
144+ /* Pointer to an array of ETH_MAX_PACKET_SIZE uint8_t's */
145+ typedef uint8_t (* RxBufferPtr )[ETH_MAX_PACKET_SIZE ];
152146
153147/* called by HAL_ETH_ReadData() */
154148void HAL_ETH_RxLinkCallback (void * * pStart , void * * pEnd , uint8_t * buff , uint16_t Length )
@@ -159,7 +153,7 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
159153 size_t index = (RxBufferPtr )buff - & dma_rx_buffer [0 ];
160154 struct eth_stm32_rx_buffer_header * header = & dma_rx_buffer_header [index ];
161155
162- __ASSERT_NO_MSG (index < ETH_RXBUFNB );
156+ __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
163157
164158 header -> size = Length ;
165159
@@ -200,7 +194,7 @@ void HAL_ETH_TxFreeCallback(uint32_t *buff)
200194static inline uint16_t allocate_tx_buffer (void )
201195{
202196 for (;;) {
203- for (uint16_t index = 0 ; index < ETH_TXBUFNB ; index ++ ) {
197+ for (uint16_t index = 0 ; index < ETH_TX_DESC_CNT ; index ++ ) {
204198 if (!dma_tx_buffer_header [index ].used ) {
205199 dma_tx_buffer_header [index ].used = true;
206200 return index ;
@@ -330,7 +324,7 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
330324 heth = & dev_data -> heth ;
331325
332326 total_len = net_pkt_get_len (pkt );
333- if (total_len > (ETH_STM32_TX_BUF_SIZE * ETH_TXBUFNB )) {
327+ if (total_len > (ETH_MAX_PACKET_SIZE * ETH_TX_DESC_CNT )) {
334328 LOG_ERR ("PKT too big" );
335329 return - EIO ;
336330 }
@@ -373,19 +367,19 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
373367#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
374368 remaining_read = total_len ;
375369 /* fill and allocate buffer until remaining data fits in one buffer */
376- while (remaining_read > ETH_STM32_TX_BUF_SIZE ) {
377- if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_STM32_TX_BUF_SIZE )) {
370+ while (remaining_read > ETH_MAX_PACKET_SIZE ) {
371+ if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_MAX_PACKET_SIZE )) {
378372 res = - ENOBUFS ;
379373 goto error ;
380374 }
381375 const uint16_t next_buffer_id = allocate_tx_buffer ();
382376
383- buf_header -> tx_buff .len = ETH_STM32_TX_BUF_SIZE ;
377+ buf_header -> tx_buff .len = ETH_MAX_PACKET_SIZE ;
384378 /* append new buffer to the linked list */
385379 buf_header -> tx_buff .next = & dma_tx_buffer_header [next_buffer_id ].tx_buff ;
386380 /* and adjust tail pointer */
387381 buf_header = & dma_tx_buffer_header [next_buffer_id ];
388- remaining_read -= ETH_STM32_TX_BUF_SIZE ;
382+ remaining_read -= ETH_MAX_PACKET_SIZE ;
389383 }
390384 if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , remaining_read )) {
391385 res = - ENOBUFS ;
@@ -735,7 +729,7 @@ static struct net_pkt *eth_rx(const struct device *dev)
735729 rx_header ; rx_header = rx_header -> next ) {
736730 const size_t index = rx_header - & dma_rx_buffer_header [0 ];
737731
738- __ASSERT_NO_MSG (index < ETH_RXBUFNB );
732+ __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
739733 if (net_pkt_write (pkt , dma_rx_buffer [index ], rx_header -> size )) {
740734 LOG_ERR ("Failed to append RX buffer to context buffer" );
741735 net_pkt_unref (pkt );
@@ -1127,7 +1121,7 @@ static int eth_initialize(const struct device *dev)
11271121 defined(CONFIG_ETH_STM32_HAL_API_V2 )
11281122 heth -> Init .TxDesc = dma_tx_desc_tab ;
11291123 heth -> Init .RxDesc = dma_rx_desc_tab ;
1130- heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
1124+ heth -> Init .RxBuffLen = ETH_MAX_PACKET_SIZE ;
11311125#endif /* CONFIG_SOC_SERIES_STM32H7X || CONFIG_SOC_SERIES_STM32H5X || CONFIG_ETH_STM32_HAL_API_V2 */
11321126
11331127 hal_ret = HAL_ETH_Init (heth );
@@ -1196,7 +1190,7 @@ static int eth_initialize(const struct device *dev)
11961190#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
11971191
11981192 /* prepare tx buffer header */
1199- for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
1193+ for (uint16_t i = 0 ; i < ETH_TX_DESC_CNT ; ++ i ) {
12001194 dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
12011195 }
12021196
@@ -1215,9 +1209,9 @@ static int eth_initialize(const struct device *dev)
12151209 hal_ret = HAL_ETH_Start_IT (heth );
12161210#else
12171211 HAL_ETH_DMATxDescListInit (heth , dma_tx_desc_tab ,
1218- & dma_tx_buffer [0 ][0 ], ETH_TXBUFNB );
1212+ & dma_tx_buffer [0 ][0 ], ETH_TX_DESC_CNT );
12191213 HAL_ETH_DMARxDescListInit (heth , dma_rx_desc_tab ,
1220- & dma_rx_buffer [0 ][0 ], ETH_RXBUFNB );
1214+ & dma_rx_buffer [0 ][0 ], ETH_RX_DESC_CNT );
12211215
12221216 hal_ret = HAL_ETH_Start (heth );
12231217#endif /* CONFIG_ETH_STM32_HAL_API_V2 */
@@ -1505,14 +1499,14 @@ static struct eth_stm32_hal_dev_data eth0_data = {
15051499 ETH_CHECKSUM_BY_HARDWARE : ETH_CHECKSUM_BY_SOFTWARE ,
15061500#endif /* !CONFIG_SOC_SERIES_STM32H7X */
15071501 .MediaInterface = IS_ENABLED (CONFIG_ETH_STM32_HAL_MII ) ?
1508- ETH_MEDIA_INTERFACE_MII : ETH_MEDIA_INTERFACE_RMII ,
1502+ HAL_ETH_MII_MODE : HAL_ETH_RMII_MODE ,
15091503 },
15101504 },
15111505};
15121506
15131507ETH_NET_DEVICE_DT_INST_DEFINE (0 , eth_initialize ,
15141508 NULL , & eth0_data , & eth0_config ,
1515- CONFIG_ETH_INIT_PRIORITY , & eth_api , ETH_STM32_HAL_MTU );
1509+ CONFIG_ETH_INIT_PRIORITY , & eth_api , NET_ETH_MTU );
15161510
15171511#if defined(CONFIG_PTP_CLOCK_STM32_HAL )
15181512
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