Skip to content

Commit 017140f

Browse files
LukasWoodtliLukasWoodtli
committed
soc: Add support for Silabs EFM32TG
* ARM Cortex-M3 processor * Up to 32 kB Flash and 4 kB RAM memory * Energy efficient and autonomous peripherals * Ultra low power Energy Modes * Fast wake-up Signed-off-by: Lukas Woodtli <[email protected]>
1 parent 6ee55e4 commit 017140f

File tree

9 files changed

+267
-1
lines changed

9 files changed

+267
-1
lines changed

‎dts/arm/silabs/efm32tg.dtsi‎

Lines changed: 169 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,169 @@
1+
/*
2+
* Copyright (c) 2025 Lukas Woodtli
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <arm/armv7-m.dtsi>
8+
#include <zephyr/dt-bindings/gpio/gpio.h>
9+
#include <zephyr/dt-bindings/i2c/i2c.h>
10+
#include "gpio_gecko.h"
11+
12+
/ {
13+
chosen {
14+
zephyr,flash-controller = &msc;
15+
};
16+
17+
cpus {
18+
#address-cells = <1>;
19+
#size-cells = <0>;
20+
21+
cpu0: cpu@0 {
22+
compatible = "arm,cortex-m3";
23+
reg = <0>;
24+
};
25+
};
26+
27+
sram0: memory@20000000 {
28+
compatible = "mmio-sram";
29+
};
30+
31+
soc {
32+
msc: flash-controller@400c0000 {
33+
compatible = "silabs,gecko-flash-controller";
34+
reg = <0x400c0000 0x78>;
35+
interrupts = <21 0>;
36+
37+
#address-cells = <1>;
38+
#size-cells = <1>;
39+
40+
flash0: flash@0 {
41+
compatible = "soc-nv-flash";
42+
write-block-size = <4>;
43+
erase-block-size = <512>;
44+
};
45+
};
46+
47+
usart0: usart@4000c000 { /* USART0 */
48+
compatible = "silabs,gecko-usart";
49+
reg = <0x4000c000 0x400>;
50+
interrupts = <3 0>, <4 0>;
51+
interrupt-names = "rx", "tx";
52+
peripheral-id = <0>;
53+
status = "disabled";
54+
};
55+
56+
usart1: usart@4000c400 { /* USART1 */
57+
compatible = "silabs,gecko-usart";
58+
reg = <0x4000c400 0x400>;
59+
interrupts = <15 0>, <16 0>;
60+
interrupt-names = "rx", "tx";
61+
peripheral-id = <1>;
62+
status = "disabled";
63+
};
64+
65+
66+
leuart0: leuart@40084000 { /* LEUART0 */
67+
compatible = "silabs,gecko-leuart";
68+
reg = <0x40084000 0x400>;
69+
interrupts = <24 0>;
70+
peripheral-id = <0>;
71+
status = "disabled";
72+
};
73+
74+
leuart1: leuart@40084400 { /* LEUART1 */
75+
compatible = "silabs,gecko-leuart";
76+
reg = <0x40084400 0x400>;
77+
interrupts = <25 0>;
78+
peripheral-id = <1>;
79+
status = "disabled";
80+
};
81+
82+
i2c0: i2c@4000a000 {
83+
compatible = "silabs,gecko-i2c";
84+
clock-frequency = <I2C_BITRATE_STANDARD>;
85+
#address-cells = <1>;
86+
#size-cells = <0>;
87+
reg = <0x4000a000 0x400>;
88+
interrupts = <9 0>;
89+
status = "disabled";
90+
};
91+
92+
gpio@40006100 {
93+
compatible = "silabs,gecko-gpio";
94+
reg = <0x40006100 0xf00>;
95+
interrupts = <1 2 11 2>;
96+
interrupt-names = "GPIO_EVEN", "GPIO_ODD";
97+
98+
ranges;
99+
#address-cells = <1>;
100+
#size-cells = <1>;
101+
102+
gpioa: gpio@40006000 {
103+
compatible = "silabs,gecko-gpio-port";
104+
reg = <0x40006000 0x24>;
105+
peripheral-id = <0>;
106+
gpio-controller;
107+
#gpio-cells = <2>;
108+
status = "disabled";
109+
};
110+
111+
gpiob: gpio@40006024 {
112+
compatible = "silabs,gecko-gpio-port";
113+
reg = <0x40006024 0x24>;
114+
peripheral-id = <1>;
115+
gpio-controller;
116+
#gpio-cells = <2>;
117+
status = "disabled";
118+
};
119+
120+
gpioc: gpio@40006048 {
121+
compatible = "silabs,gecko-gpio-port";
122+
reg = <0x40006048 0x24>;
123+
peripheral-id = <2>;
124+
gpio-controller;
125+
#gpio-cells = <2>;
126+
status = "disabled";
127+
};
128+
129+
gpiod: gpio@4000606c {
130+
compatible = "silabs,gecko-gpio-port";
131+
reg = <0x4000606c 0x24>;
132+
peripheral-id = <3>;
133+
gpio-controller;
134+
#gpio-cells = <2>;
135+
status = "disabled";
136+
};
137+
138+
gpioe: gpio@40006090 {
139+
compatible = "silabs,gecko-gpio-port";
140+
reg = <0x40006090 0x24>;
141+
peripheral-id = <4>;
142+
gpio-controller;
143+
#gpio-cells = <2>;
144+
status = "disabled";
145+
};
146+
147+
gpiof: gpio@400060b4 {
148+
compatible = "silabs,gecko-gpio-port";
149+
reg = <0x400060b4 0x24>;
150+
peripheral-id = <5>;
151+
gpio-controller;
152+
#gpio-cells = <2>;
153+
status = "disabled";
154+
};
155+
};
156+
157+
pinctrl: pin-controller {
158+
/* Pin controller is a "virtual" device since SiLabs SoCs do pin
159+
* control in a distributed way (GPIO registers and PSEL
160+
* registers on each peripheral).
161+
*/
162+
compatible = "silabs,gecko-pinctrl";
163+
};
164+
};
165+
};
166+
167+
&nvic {
168+
arm,num-irq-priority-bits = <3>;
169+
};

‎modules/hal_silabs/gecko/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@ zephyr_library_sources_ifdef(CONFIG_SOC_GECKO_TIMER ${EMLIB_DIR}/src/em_t
102102
zephyr_library_sources_ifdef(CONFIG_SOC_GECKO_USART ${EMLIB_DIR}/src/em_usart.c)
103103
zephyr_library_sources_ifdef(CONFIG_SOC_GECKO_WDOG ${EMLIB_DIR}/src/em_wdog.c)
104104
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_EFM32WG ${DEVICE_DIR}/SiliconLabs/EFM32WG/Source/system_efm32wg.c)
105+
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_EFM32TG ${DEVICE_DIR}/SiliconLabs/EFM32TG/Source/system_efm32tg.c)
105106
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_EFR32BG13P ${DEVICE_DIR}/SiliconLabs/EFR32BG13P/Source/system_efr32bg13p.c)
106107
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_EFR32FG1P ${DEVICE_DIR}/SiliconLabs/EFR32FG1P/Source/system_efr32fg1p.c)
107108
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_EFR32FG13P ${DEVICE_DIR}/SiliconLabs/EFR32FG13P/Source/system_efr32fg13p.c)

‎soc/silabs/silabs_s0/efm32tg/Kconfig‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
# Copyright (c) 2025 Lukas Woodtli
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_SERIES_EFM32TG
5+
select ARM
6+
select CPU_CORTEX_M3
7+
select CPU_CORTEX_M_HAS_DWT
8+
select HAS_SILABS_GECKO
9+
select SOC_GECKO_CMU
10+
select SOC_GECKO_GPIO
11+
select HAS_PM
12+
13+
config SOC_GECKO_SDID
14+
default 73 if SOC_SERIES_EFM32TG

‎soc/silabs/silabs_s0/efm32tg/Kconfig.defconfig‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
# Copyright (c) 2025 Lukas Woodtli
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if SOC_SERIES_EFM32TG
5+
6+
config NUM_IRQS
7+
# must be >= the highest interrupt number used
8+
default 39
9+
10+
endif

‎soc/silabs/silabs_s0/efm32tg/Kconfig.soc‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
# Copyright (c) 2025 Lukas Woodtli
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_SERIES_EFM32TG
5+
bool
6+
select SOC_FAMILY_SILABS_S0
7+
help
8+
Silicon Labs EFM32TG (Tiny Gecko) Series MCU
9+
10+
config SOC_PART_NUMBER_EFM32TG840F32
11+
bool
12+
select SOC_SERIES_EFM32TG
13+
14+
config SOC_SERIES
15+
default "efm32tg" if SOC_SERIES_EFM32TG
16+
17+
config SOC
18+
default "efm32tg840f32" if SOC_PART_NUMBER_EFM32TG840F32
19+
20+
config SOC_PART_NUMBER
21+
default "EFM32TG840F32" if SOC_PART_NUMBER_EFM32TG840F32

‎soc/silabs/silabs_s0/efm32tg/soc.h‎

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
/*
2+
* Copyright (c) 2025 Lukas Woodtli
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/**
8+
* @file
9+
* @brief Board configuration macros for the efm32tg soc
10+
*
11+
*/
12+
13+
#ifndef _SOC__H_
14+
#define _SOC__H_
15+
16+
#include <zephyr/sys/util.h>
17+
18+
#ifndef _ASMLANGUAGE
19+
20+
#include <em_bus.h>
21+
#include <em_common.h>
22+
23+
24+
#include "soc_pinmap.h"
25+
#include "../common/soc_gpio.h"
26+
27+
#endif /* !_ASMLANGUAGE */
28+
29+
#endif /* _SOC__H_ */

‎soc/silabs/silabs_s0/efm32tg/soc_pinmap.h‎

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
/*
2+
* Copyright (c) 2025 Lukas Woodtli
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
/** @file
7+
* @brief Silabs EFM32TG MCU pin definitions.
8+
*
9+
* This file contains pin configuration data required by different MCU
10+
* modules to correctly configure GPIO controller.
11+
*/
12+
13+
#ifndef _SILABS_EFM32TG_SOC_PINMAP_H_
14+
#define _SILABS_EFM32TG_SOC_PINMAP_H_
15+
16+
#include <soc.h>
17+
#include <em_gpio.h>
18+
19+
#endif /* _SILABS_EFM32TG_SOC_PINMAP_H_ */

‎soc/silabs/soc.yml‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,9 @@ family:
77
- name: efm32hg
88
socs:
99
- name: efm32hg322f64
10+
- name: efm32tg
11+
socs:
12+
- name: efm32tg840f32
1013
- name: silabs_s1
1114
series:
1215
- name: efm32pg1b

‎west.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ manifest:
235235
groups:
236236
- hal
237237
- name: hal_silabs
238-
revision: 389726f350880238b9a1034f575ffd46c4309827
238+
revision: pull/108/head
239239
path: modules/hal/silabs
240240
groups:
241241
- hal

0 commit comments

Comments
 (0)