soc: andestech: run pma_init_per_core() with soc_per_core_init_hook()

The function `pma_init_per_core()`, as its name suggest, should be
run from every core, so call it from `soc_per_core_init_hook()`

Signed-off-by: Yong Cong Sin <[email protected]>
Signed-off-by: Yong Cong Sin <[email protected]>

Author: ycsin

soc/andestech/ae350/CMakeLists.txt

@@ -3,6 +3,7 @@
 zephyr_include_directories(.)
 
 zephyr_sources(
+  soc.c
   start.S
   soc_irq.S
 )

soc/andestech/ae350/Kconfig

@@ -92,6 +92,7 @@ config SOC_ANDES_V5_PMA
 	bool "Andes V5 Physical Memory Attribute (PMA)"
 	select ARCH_HAS_NOCACHE_MEMORY_SUPPORT
 	select SOC_EARLY_INIT_HOOK
+	select SOC_PER_CORE_INIT_HOOK
 	help
 		This option enables the Andes V5 PMA, in order to support SW to
 		configure physical memory attribute by PMA CSRs. The address

soc/andestech/ae350/pma.c

@@ -187,13 +187,6 @@ static void configure_nocache_region(void)
 }
 #endif /* CONFIG_NOCACHE_MEMORY */
 
-/*
- * @brief Init PMA CSRs of each CPU core
- *
- * In SMP, each CPU has it's own PMA CSR and PMA CSR only affect one CPU.
- * We should configure CSRs of all CPUs to make memory attribute
- * (e.g. uncacheable) affects all CPUs.
- */
 void pma_init_per_core(void)
 {
 #ifdef CONFIG_NOCACHE_MEMORY
@@ -218,6 +211,4 @@ void soc_early_init_hook(void)
 #endif
 		return;
 	}
-
-	pma_init_per_core();
 }

soc/andestech/ae350/pma.h

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2021 Andes Technology Corporation
+ * Copyright (c) 2024 Meta Platforms
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/*
+ * @brief Init PMA CSRs of each CPU core
+ *
+ * In SMP, each CPU has it's own PMA CSR and PMA CSR only affect one CPU.
+ * We should configure CSRs of all CPUs to make memory attribute
+ * (e.g. uncacheable) affects all CPUs.
+ */
+void pma_init_per_core(void);

soc/andestech/ae350/soc.c

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2024 Meta Platforms
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "pma.h"
+
+#ifdef CONFIG_SOC_PER_CORE_INIT_HOOK
+void soc_per_core_init_hook(void)
+{
+#ifdef CONFIG_SOC_ANDES_V5_PMA
+	pma_init_per_core();
+#endif /* SOC_ANDES_V5_PMA */
+}
+#endif /* CONFIG_SOC_PER_CORE_INIT_HOOK */