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14 | 14 | #include <logging/log.h> |
15 | 15 | LOG_MODULE_DECLARE(pm, CONFIG_PM_LOG_LEVEL); |
16 | 16 |
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| 17 | +/** |
| 18 | + * Check CPU power state consistency. |
| 19 | + * |
| 20 | + * @param i Power state index. |
| 21 | + * @param node_id CPU node identifier. |
| 22 | + */ |
| 23 | +#define CHECK_POWER_STATE_CONSISTENCY(i, node_id) \ |
| 24 | + BUILD_ASSERT( \ |
| 25 | + DT_PROP_BY_PHANDLE_IDX_OR(node_id, cpu_power_states, i, \ |
| 26 | + min_residency_us, 0U) >= \ |
| 27 | + DT_PROP_BY_PHANDLE_IDX_OR(node_id, cpu_power_states, i, \ |
| 28 | + exit_latency_us, 0U), \ |
| 29 | + "Found CPU power state with min_residency < exit_latency"); |
| 30 | + |
| 31 | +/** |
| 32 | + * @brief Check CPU power states consistency |
| 33 | + * |
| 34 | + * All states should have a minimum residency >= than the exit latency. |
| 35 | + * |
| 36 | + * @param node_id A CPU node identifier. |
| 37 | + */ |
| 38 | +#define CHECK_POWER_STATES_CONSISTENCY(node_id) \ |
| 39 | + UTIL_LISTIFY(DT_NUM_CPU_POWER_STATES(node_id), \ |
| 40 | + CHECK_POWER_STATE_CONSISTENCY, node_id) \ |
| 41 | + |
| 42 | +/* Check that all power states are consistent */ |
| 43 | +COND_CODE_1(DT_NODE_EXISTS(DT_PATH(cpus)), |
| 44 | + (DT_FOREACH_CHILD(DT_PATH(cpus), CHECK_POWER_STATES_CONSISTENCY)), |
| 45 | + ()) |
| 46 | + |
17 | 47 | #define NUM_CPU_STATES(n) DT_NUM_CPU_POWER_STATES(n), |
18 | 48 | #define CPU_STATES(n) (struct pm_state_info[])PM_STATE_INFO_LIST_FROM_DT_CPU(n), |
19 | 49 |
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@@ -47,8 +77,6 @@ struct pm_state_info pm_policy_next_state(uint8_t cpu, int32_t ticks) |
47 | 77 |
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48 | 78 | min_residency = k_us_to_ticks_ceil32(state->min_residency_us); |
49 | 79 | exit_latency = k_us_to_ticks_ceil32(state->exit_latency_us); |
50 | | - __ASSERT(min_residency > exit_latency, |
51 | | - "min_residency_us < exit_latency_us"); |
52 | 80 |
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53 | 81 | if ((ticks == K_TICKS_FOREVER) || |
54 | 82 | (ticks >= (min_residency + exit_latency))) { |
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