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20 | 20 | #include <zephyr/drivers/pinctrl.h>
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21 | 21 | #include <zephyr/drivers/clock_control/stm32_clock_control.h>
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22 | 22 | #include <zephyr/sys/util.h>
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23 |
| -#include <zephyr/usb/usb_device.h> |
24 | 23 |
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25 | 24 | #include "udc_common.h"
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26 | 25 |
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@@ -636,44 +635,43 @@ static int udc_stm32_host_wakeup(const struct device *dev)
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636 | 635 | return 0;
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637 | 636 | }
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638 | 637 |
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639 |
| -static inline int eptype2hal(enum usb_dc_ep_transfer_type eptype) |
640 |
| -{ |
641 |
| - switch (eptype) { |
642 |
| - case USB_DC_EP_CONTROL: |
643 |
| - return EP_TYPE_CTRL; |
644 |
| - case USB_DC_EP_ISOCHRONOUS: |
645 |
| - return EP_TYPE_ISOC; |
646 |
| - case USB_DC_EP_BULK: |
647 |
| - return EP_TYPE_BULK; |
648 |
| - case USB_DC_EP_INTERRUPT: |
649 |
| - return EP_TYPE_INTR; |
650 |
| - default: |
651 |
| - return -EINVAL; |
652 |
| - } |
653 |
| - |
654 |
| - return -EINVAL; |
655 |
| -} |
656 |
| - |
657 | 638 | static int udc_stm32_ep_enable(const struct device *dev,
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658 |
| - struct udc_ep_config *ep) |
| 639 | + struct udc_ep_config *ep_cfg) |
659 | 640 | {
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660 |
| - enum usb_dc_ep_transfer_type type = ep->attributes & USB_EP_TRANSFER_TYPE_MASK; |
661 | 641 | struct udc_stm32_data *priv = udc_get_private(dev);
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662 | 642 | HAL_StatusTypeDef status;
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| 643 | + uint8_t ep_type; |
663 | 644 | int ret;
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664 | 645 |
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665 |
| - LOG_DBG("Enable ep 0x%02x", ep->addr); |
| 646 | + LOG_DBG("Enable ep 0x%02x", ep_cfg->addr); |
| 647 | + |
| 648 | + switch (ep_cfg->attributes & USB_EP_TRANSFER_TYPE_MASK) { |
| 649 | + case USB_EP_TYPE_CONTROL: |
| 650 | + ep_type = EP_TYPE_CTRL; |
| 651 | + break; |
| 652 | + case USB_EP_TYPE_BULK: |
| 653 | + ep_type = EP_TYPE_BULK; |
| 654 | + break; |
| 655 | + case USB_EP_TYPE_INTERRUPT: |
| 656 | + ep_type = EP_TYPE_INTR; |
| 657 | + break; |
| 658 | + case USB_EP_TYPE_ISO: |
| 659 | + ep_type = EP_TYPE_ISOC; |
| 660 | + break; |
| 661 | + default: |
| 662 | + return -EINVAL; |
| 663 | + } |
666 | 664 |
|
667 |
| - ret = udc_stm32_ep_mem_config(dev, ep, true); |
| 665 | + ret = udc_stm32_ep_mem_config(dev, ep_cfg, true); |
668 | 666 | if (ret) {
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669 | 667 | return ret;
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670 | 668 | }
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671 | 669 |
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672 |
| - status = HAL_PCD_EP_Open(&priv->pcd, ep->addr, ep->mps, |
673 |
| - eptype2hal(type)); |
| 670 | + status = HAL_PCD_EP_Open(&priv->pcd, ep_cfg->addr, ep_cfg->mps, |
| 671 | + ep_type); |
674 | 672 | if (status != HAL_OK) {
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675 | 673 | LOG_ERR("HAL_PCD_EP_Open failed(0x%02x), %d",
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676 |
| - ep->addr, (int)status); |
| 674 | + ep_cfg->addr, (int)status); |
677 | 675 | return -EIO;
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678 | 676 | }
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679 | 677 |
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