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Georgij CernysiovBenichou34
authored and
galak
committed
drivers: serial: stm32: dts binding, and fixup for flow control
Allows to enable initial RTS/CTS hardware flow control in the dts. Co-authored-by: Benoit Leforestier <[email protected]> Signed-off-by: Georgij Cernysiov <[email protected]>
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13 files changed

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-0
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13 files changed

+63
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‎drivers/serial/uart_stm32.c‎

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@@ -722,6 +722,10 @@ static int uart_stm32_init(struct device *dev)
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LL_USART_PARITY_NONE,
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LL_USART_STOPBITS_1);
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725+
if (config->hw_flow_control) {
726+
uart_stm32_set_hwctrl(dev, LL_USART_HWCONTROL_RTS_CTS);
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}
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/* Set the default baudrate */
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uart_stm32_set_baudrate(dev, data->baud_rate);
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@@ -777,6 +781,7 @@ static const struct uart_stm32_config uart_stm32_cfg_##name = { \
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.pclken = { .bus = DT_UART_STM32_##name##_CLOCK_BUS, \
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.enr = DT_UART_STM32_##name##_CLOCK_BITS \
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}, \
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.hw_flow_control = DT_UART_STM32_##name##_HW_FLOW_CONTROL \
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}; \
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\
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static struct uart_stm32_data uart_stm32_data_##name = { \

‎drivers/serial/uart_stm32.h‎

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@@ -17,6 +17,8 @@ struct uart_stm32_config {
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struct uart_device_config uconf;
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/* clock subsystem driving this peripheral */
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struct stm32_pclken pclken;
20+
/* initial hardware flow control, 1 for RTS/CTS */
21+
bool hw_flow_control;
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};
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/* driver data */

‎dts/bindings/serial/st,stm32-lpuart.yaml‎

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@@ -29,4 +29,10 @@ properties:
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category: required
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description: Clock gate information
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generation: define
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hw-flow-control:
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type: boolean
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category: optional
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description: Set to enable RTS/CTS flow control at boot time
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generation: define
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...

‎dts/bindings/serial/st,stm32-uart.yaml‎

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@@ -23,4 +23,10 @@ properties:
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category: required
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description: required interrupts
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generation: define
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hw-flow-control:
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type: boolean
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category: optional
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description: Set to enable RTS/CTS flow control at boot time
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generation: define
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...

‎dts/bindings/serial/st,stm32-usart.yaml‎

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@@ -23,4 +23,10 @@ properties:
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category: required
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description: required interrupts
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generation: define
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hw-flow-control:
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type: boolean
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category: optional
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description: Set to enable RTS/CTS flow control at boot time
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generation: define
2632
...

‎soc/arm/st_stm32/stm32f0/dts_fixup.h‎

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@@ -65,6 +65,7 @@
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#define DT_USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
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#define DT_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
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#define DT_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
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#define DT_UART_STM32_USART_1_HW_FLOW_CONTROL DT_ST_STM32_USART_40013800_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
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#define DT_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
@@ -73,6 +74,7 @@
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#define DT_USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
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#define DT_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
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#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
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#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
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#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
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#define DT_I2C_1_COMBINED_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY

‎soc/arm/st_stm32/stm32f1/dts_fixup.h‎

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@@ -74,6 +74,7 @@
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#define DT_USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
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#define DT_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
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#define DT_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
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#define DT_UART_STM32_USART_1_HW_FLOW_CONTROL DT_ST_STM32_USART_40013800_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
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#define DT_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
@@ -82,6 +83,7 @@
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#define DT_USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
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#define DT_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
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#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
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#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
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#define DT_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
@@ -90,6 +92,7 @@
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#define DT_USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
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#define DT_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
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#define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
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#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL
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#define DT_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
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#define DT_UART_STM32_UART_4_BAUD_RATE DT_ST_STM32_UART_40004C00_CURRENT_SPEED
@@ -98,6 +101,7 @@
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#define DT_UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
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#define DT_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
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#define DT_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
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#define DT_UART_STM32_UART_4_HW_FLOW_CONTROL DT_ST_STM32_UART_40004C00_HW_FLOW_CONTROL
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#define DT_UART_STM32_UART_5_BASE_ADDRESS DT_ST_STM32_UART_40005000_BASE_ADDRESS
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#define DT_UART_STM32_UART_5_BAUD_RATE DT_ST_STM32_UART_40005000_CURRENT_SPEED
@@ -106,6 +110,7 @@
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#define DT_UART_5_IRQ DT_ST_STM32_UART_40005000_IRQ_0
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#define DT_UART_STM32_UART_5_CLOCK_BITS DT_ST_STM32_UART_40005000_CLOCK_BITS
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#define DT_UART_STM32_UART_5_CLOCK_BUS DT_ST_STM32_UART_40005000_CLOCK_BUS
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#define DT_UART_STM32_UART_5_HW_FLOW_CONTROL DT_ST_STM32_UART_40005000_HW_FLOW_CONTROL
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110115
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
111116
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY

‎soc/arm/st_stm32/stm32f2/dts_fixup.h‎

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@@ -92,6 +92,7 @@
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#define DT_USART_1_IRQ DT_ST_STM32_USART_40011000_IRQ_0
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#define DT_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40011000_CLOCK_BITS
9494
#define DT_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40011000_CLOCK_BUS
95+
#define DT_UART_STM32_USART_1_HW_FLOW_CONTROL DT_ST_STM32_USART_40011000_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
9798
#define DT_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
@@ -100,6 +101,7 @@
100101
#define DT_USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
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#define DT_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
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#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
104+
#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
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#define DT_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
@@ -108,6 +110,7 @@
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#define DT_USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
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#define DT_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
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#define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
113+
#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_6_NAME DT_ST_STM32_USART_40011400_LABEL
113116
#define DT_UART_STM32_USART_6_BASE_ADDRESS DT_ST_STM32_USART_40011400_BASE_ADDRESS
@@ -116,6 +119,7 @@
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#define DT_USART_6_IRQ DT_ST_STM32_USART_40011400_IRQ_0
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#define DT_UART_STM32_USART_6_CLOCK_BITS DT_ST_STM32_USART_40011400_CLOCK_BITS
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#define DT_UART_STM32_USART_6_CLOCK_BUS DT_ST_STM32_USART_40011400_CLOCK_BUS
122+
#define DT_UART_STM32_USART_6_HW_FLOW_CONTROL DT_ST_STM32_USART_40011400_HW_FLOW_CONTROL
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#define DT_UART_STM32_UART_4_NAME DT_ST_STM32_UART_40004C00_LABEL
121125
#define DT_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
@@ -124,6 +128,7 @@
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#define DT_UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
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#define DT_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
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#define DT_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
131+
#define DT_UART_STM32_UART_4_HW_FLOW_CONTROL DT_ST_STM32_UART_40004C00_HW_FLOW_CONTROL
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#define DT_UART_STM32_UART_5_NAME DT_ST_STM32_UART_40005000_LABEL
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#define DT_UART_STM32_UART_5_BASE_ADDRESS DT_ST_STM32_UART_40005000_BASE_ADDRESS
@@ -132,6 +137,7 @@
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#define DT_UART_5_IRQ DT_ST_STM32_UART_40005000_IRQ_0
133138
#define DT_UART_STM32_UART_5_CLOCK_BITS DT_ST_STM32_UART_40005000_CLOCK_BITS
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#define DT_UART_STM32_UART_5_CLOCK_BUS DT_ST_STM32_UART_40005000_CLOCK_BUS
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#define DT_UART_STM32_UART_5_HW_FLOW_CONTROL DT_ST_STM32_UART_40005000_HW_FLOW_CONTROL
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#define DT_USB_BASE_ADDRESS DT_ST_STM32_OTGFS_50000000_BASE_ADDRESS
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#define DT_USB_IRQ DT_ST_STM32_OTGFS_50000000_IRQ_OTGFS

‎soc/arm/st_stm32/stm32f3/dts_fixup.h‎

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#define DT_USART_1_IRQ DT_ST_STM32_USART_40013800_IRQ_0
6666
#define DT_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40013800_CLOCK_BITS
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#define DT_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40013800_CLOCK_BUS
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#define DT_UART_STM32_USART_1_HW_FLOW_CONTROL DT_ST_STM32_USART_40013800_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
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#define DT_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
@@ -73,6 +74,7 @@
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#define DT_USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
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#define DT_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
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#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
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#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
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#define DT_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
@@ -81,6 +83,7 @@
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#define DT_USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
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#define DT_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
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#define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
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#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL
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#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V2_40005400_BASE_ADDRESS
8689
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY

‎soc/arm/st_stm32/stm32f4/dts_fixup.h‎

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#define DT_USART_1_IRQ DT_ST_STM32_USART_40011000_IRQ_0
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#define DT_UART_STM32_USART_1_CLOCK_BITS DT_ST_STM32_USART_40011000_CLOCK_BITS
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#define DT_UART_STM32_USART_1_CLOCK_BUS DT_ST_STM32_USART_40011000_CLOCK_BUS
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#define DT_UART_STM32_USART_1_HW_FLOW_CONTROL DT_ST_STM32_USART_40011000_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_2_BASE_ADDRESS DT_ST_STM32_USART_40004400_BASE_ADDRESS
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#define DT_UART_STM32_USART_2_BAUD_RATE DT_ST_STM32_USART_40004400_CURRENT_SPEED
@@ -118,6 +119,7 @@
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#define DT_USART_2_IRQ DT_ST_STM32_USART_40004400_IRQ_0
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#define DT_UART_STM32_USART_2_CLOCK_BITS DT_ST_STM32_USART_40004400_CLOCK_BITS
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#define DT_UART_STM32_USART_2_CLOCK_BUS DT_ST_STM32_USART_40004400_CLOCK_BUS
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#define DT_UART_STM32_USART_2_HW_FLOW_CONTROL DT_ST_STM32_USART_40004400_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_3_BASE_ADDRESS DT_ST_STM32_USART_40004800_BASE_ADDRESS
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#define DT_UART_STM32_USART_3_BAUD_RATE DT_ST_STM32_USART_40004800_CURRENT_SPEED
@@ -126,6 +128,7 @@
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#define DT_USART_3_IRQ DT_ST_STM32_USART_40004800_IRQ_0
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#define DT_UART_STM32_USART_3_CLOCK_BITS DT_ST_STM32_USART_40004800_CLOCK_BITS
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#define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
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#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL
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#define DT_UART_STM32_UART_4_BASE_ADDRESS DT_ST_STM32_UART_40004C00_BASE_ADDRESS
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#define DT_UART_STM32_UART_4_BAUD_RATE DT_ST_STM32_UART_40004C00_CURRENT_SPEED
@@ -134,6 +137,7 @@
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#define DT_UART_4_IRQ DT_ST_STM32_UART_40004C00_IRQ_0
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#define DT_UART_STM32_UART_4_CLOCK_BITS DT_ST_STM32_UART_40004C00_CLOCK_BITS
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#define DT_UART_STM32_UART_4_CLOCK_BUS DT_ST_STM32_UART_40004C00_CLOCK_BUS
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#define DT_UART_STM32_UART_4_HW_FLOW_CONTROL DT_ST_STM32_UART_40004C00_HW_FLOW_CONTROL
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#define DT_UART_STM32_USART_6_NAME DT_ST_STM32_USART_40011400_LABEL
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#define DT_UART_STM32_USART_6_BASE_ADDRESS DT_ST_STM32_USART_40011400_BASE_ADDRESS
@@ -142,6 +146,7 @@
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#define DT_USART_6_IRQ DT_ST_STM32_USART_40011400_IRQ_0
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#define DT_UART_STM32_USART_6_CLOCK_BITS DT_ST_STM32_USART_40011400_CLOCK_BITS
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#define DT_UART_STM32_USART_6_CLOCK_BUS DT_ST_STM32_USART_40011400_CLOCK_BUS
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#define DT_UART_STM32_USART_6_HW_FLOW_CONTROL DT_ST_STM32_USART_40011400_HW_FLOW_CONTROL
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#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
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#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY

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