dts: arm: stm32g0: add can bindings for stm32g0b1 soc

In stm32g0 series only stm32g0b1 and stm32g0c1 socs support can.
This commit adds the CAN nodes to the stm32g0b1 soc.

Signed-off-by: Thomas Stranger <[email protected]>

Author: str4t0m

dts/arm/st/g0/stm32g0b1.dtsi

@@ -104,6 +104,46 @@
 			dma-channels = <12>;
 			dma-requests = <73>;
 		};
+
+		can {
+			compatible = "bosch,m-can-base";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			std-filter-elements = <28>;
+			ext-filter-elements = <8>;
+			rx-fifo0-elements = <3>;
+			rx-fifo1-elements = <3>;
+			rx-buffer-elements = <0>;
+			tx-buffer-elements = <3>;
+
+			can1: can@40006400 {
+				compatible = "st,stm32-fdcan";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40006400 0x400>, <0x4000B400 0x350>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <21 0>, <22 0>;
+				interrupt-names = "LINE_0", "LINE_1";
+				shared-irqs = <&shared_irq21 &shared_irq22>;
+				shared-irq-names = "LINE_0", "LINE_1";
+				status = "disabled";
+				label = "CAN_1";
+			};
+
+			can2: can@40006800 {
+				compatible = "st,stm32-fdcan";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40006800 0x400>, <0x4000B750 0x350>;
+				reg-names = "m_can", "message_ram";
+				interrupts = <21 0>, <22 0>;
+				interrupt-names = "LINE_0", "LINE_1";
+				shared-irqs = <&shared_irq21 &shared_irq22>;
+				shared-irq-names = "LINE_0", "LINE_1";
+				status = "disabled";
+				label = "CAN_2";
+			};
+		};
 	};
 
 	shared_irq21: shared_irq21 {