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soc/sifive/sifive-freedom: enable PMP by default on 64-bit SoCs
This commit enables PMP on 64-bit SoCs from the SiFive Freedom SoC series by default. This change is needed to e.g. run the Userspace Hello World demo. Signed-off-by: Filip Kokosinski <[email protected]>
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+12
-4
lines changed

2 files changed

+12
-4
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soc/sifive/sifive_freedom/fu500/Kconfig

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,17 +5,21 @@
55
config SOC_SERIES_SIFIVE_FREEDOM_FU500
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bool
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8+
select 64BIT
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810
# RISC-V options
911
select RISCV
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select RISCV_PRIVILEGED
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select RISCV_HAS_PLIC
14+
select RISCV_PMP
15+
1216
select RISCV_ISA_RV64I
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_A
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select RISCV_ISA_EXT_C
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZIFENCEI
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imply XIP
22+
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select SOC_EARLY_INIT_HOOK
20-
select 64BIT
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select INCLUDE_RESET_VECTOR
25+
imply XIP

soc/sifive/sifive_freedom/fu700/Kconfig

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,17 +4,21 @@
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config SOC_SERIES_SIFIVE_FREEDOM_FU700
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bool
66

7+
select 64BIT
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# RISC-V options
810
select RISCV
911
select RISCV_PRIVILEGED
1012
select RISCV_HAS_PLIC
13+
select RISCV_PMP
14+
1115
select RISCV_ISA_RV64I
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select RISCV_ISA_EXT_M
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select RISCV_ISA_EXT_A
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select RISCV_ISA_EXT_C
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select RISCV_ISA_EXT_ZICSR
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select RISCV_ISA_EXT_ZIFENCEI
17-
imply XIP
21+
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select SOC_EARLY_INIT_HOOK
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select INCLUDE_RESET_VECTOR
20-
select 64BIT
24+
imply XIP

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