dts: x86: intel: alder_lake: Added UARTs DMA instances

Added UARTs DMA instances to enable Async operations on
ADL platform

Signed-off-by: Anisetti Avinash Krishna <[email protected]>

Author: akanisetti

boards/x86/intel_adl/Kconfig.defconfig

@@ -46,4 +46,16 @@ config SHELL_STACK_SIZE
 endif # SHELL
 endif # ACPI
 
+if DMA
+config DMA_64BIT
+	default y
+config DMA_DW_HW_LLI
+	default n
+config DMA_DW_CHANNEL_COUNT
+	default 2
+endif
+
+config UART_NS16550_INTEL_LPSS_DMA
+	default y
+
 endif # BOARD_INTEL_ADL_CRB || BOARD_INTEL_ADL_RVP || BOARD_UP_SQUARED_PRO_7000

boards/x86/intel_adl/intel_adl_crb.dts

@@ -23,7 +23,3 @@
 &uart0 {
 	status = "okay";
 };
-
-&uart1 {
-	status = "okay";
-};

dts/x86/intel/alder_lake.dtsi

@@ -78,6 +78,12 @@
 			status = "disabled";
 		};
 
+		uart1_dma: uart1_dma {
+			compatible = "intel,lpss";
+			#dma-cells = <1>;
+			status = "disabled";
+		};
+
 		uart1: uart1 {
 			compatible = "ns16550";
 			vendor-id = <0x8086>;
@@ -87,6 +93,14 @@
 			reg-shift = <2>;
 			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;
+			dmas = <&uart1_dma 0>, <&uart1_dma 1>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
+		uart2_dma: uart2_dma {
+			compatible = "intel,lpss";
+			#dma-cells = <1>;
 			status = "disabled";
 		};
 
@@ -99,6 +113,8 @@
 			reg-shift = <2>;
 			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;
+			dmas = <&uart2_dma 0>, <&uart2_dma 1>;
+			dma-names = "tx", "rx";
 
 			status = "disabled";
 		};