@@ -620,7 +620,7 @@ uint32_t radio_is_done(void)
620620 * Note: this depends on the function being called exactly once
621621 * in the ISR function.
622622 */
623- last_pdu_end_us += EVENT_TIMER -> CC [2 ];
623+ last_pdu_end_us += EVENT_TIMER -> CC [HAL_EVENT_TIMER_TRX_END_CC_OFFSET ];
624624 return 1 ;
625625 } else {
626626 return 0 ;
@@ -1362,7 +1362,7 @@ uint32_t radio_tmr_start(uint8_t trx, uint32_t ticks_start, uint32_t remainder)
13621362 EVENT_TIMER -> PRESCALER = HAL_EVENT_TIMER_PRESCALER_VALUE ;
13631363 EVENT_TIMER -> BITMODE = 2 ; /* 24 - bit */
13641364
1365- nrf_timer_cc_set (EVENT_TIMER , 0 , remainder );
1365+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_TRX_CC_OFFSET , remainder );
13661366
13671367#if defined(CONFIG_BT_CTLR_NRF_GRTC )
13681368 uint32_t cntr_l , cntr_h , cntr_h_overflow , stale ;
@@ -1486,7 +1486,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t ticks_start)
14861486 nrf_timer_task_trigger (EVENT_TIMER , NRF_TIMER_TASK_STOP );
14871487 nrf_timer_task_trigger (EVENT_TIMER , NRF_TIMER_TASK_CLEAR );
14881488
1489- nrf_timer_cc_set (EVENT_TIMER , 0 , remainder_us );
1489+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_TRX_CC_OFFSET , remainder_us );
14901490
14911491#if defined(CONFIG_BT_CTLR_NRF_GRTC )
14921492 uint32_t cntr_l , cntr_h , cntr_h_overflow , stale ;
@@ -1624,15 +1624,15 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
16241624 actual_us += latency_us ;
16251625#endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
16261626
1627- nrf_timer_event_clear (EVENT_TIMER , NRF_TIMER_EVENT_COMPARE0 );
1628- nrf_timer_cc_set (EVENT_TIMER , 0 , actual_us );
1627+ nrf_timer_event_clear (EVENT_TIMER , HAL_EVENT_TIMER_TRX_EVENT );
1628+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_TRX_CC_OFFSET , actual_us );
16291629
16301630 /* Capture the current time */
1631- nrf_timer_task_trigger (EVENT_TIMER ,
1632- HAL_EVENT_TIMER_SAMPLE_TASK );
1631+ nrf_timer_task_trigger (EVENT_TIMER , HAL_EVENT_TIMER_SAMPLE_TASK );
16331632
16341633 now_us = EVENT_TIMER -> CC [HAL_EVENT_TIMER_SAMPLE_CC_OFFSET ];
1635- } while ((now_us > start_us ) && (EVENT_TIMER -> EVENTS_COMPARE [0 ] == 0U ));
1634+ } while ((now_us > start_us ) &&
1635+ (EVENT_TIMER -> EVENTS_COMPARE [HAL_EVENT_TIMER_TRX_CC_OFFSET ] == 0U ));
16361636
16371637 return actual_us ;
16381638}
@@ -1688,7 +1688,7 @@ void radio_tmr_stop(void)
16881688
16891689void radio_tmr_hcto_configure (uint32_t hcto )
16901690{
1691- nrf_timer_cc_set (EVENT_TIMER , 1 , hcto );
1691+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_HCTO_CC_OFFSET , hcto );
16921692
16931693 hal_radio_recv_timeout_cancel_ppi_config ();
16941694 hal_radio_disable_on_hcto_ppi_config ();
@@ -1708,7 +1708,7 @@ void radio_tmr_aa_capture(void)
17081708
17091709uint32_t radio_tmr_aa_get (void )
17101710{
1711- return EVENT_TIMER -> CC [1 ];
1711+ return EVENT_TIMER -> CC [HAL_EVENT_TIMER_HCTO_CC_OFFSET ];
17121712}
17131713
17141714static uint32_t radio_tmr_aa ;
@@ -1726,7 +1726,7 @@ uint32_t radio_tmr_aa_restore(void)
17261726
17271727uint32_t radio_tmr_ready_get (void )
17281728{
1729- return EVENT_TIMER -> CC [0 ];
1729+ return EVENT_TIMER -> CC [HAL_EVENT_TIMER_TRX_CC_OFFSET ];
17301730}
17311731
17321732static uint32_t radio_tmr_ready ;
@@ -1765,7 +1765,7 @@ uint32_t radio_tmr_end_get(void)
17651765#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER )
17661766 return last_pdu_end_us ;
17671767#else /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
1768- return EVENT_TIMER -> CC [2 ];
1768+ return EVENT_TIMER -> CC [HAL_EVENT_TIMER_TRX_END_CC_OFFSET ];
17691769#endif /* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
17701770}
17711771
@@ -1909,9 +1909,10 @@ void radio_gpio_lna_off(void)
19091909
19101910void radio_gpio_pa_lna_enable (uint32_t trx_us )
19111911{
1912- nrf_timer_cc_set (EVENT_TIMER , 2 , trx_us );
1912+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_PA_LNA_CC_OFFSET , trx_us );
19131913#if defined(HAL_RADIO_FEM_IS_NRF21540 ) && DT_NODE_HAS_PROP (FEM_NODE , pdn_gpios )
1914- nrf_timer_cc_set (EVENT_TIMER , 3 , (trx_us - NRF_GPIO_PDN_OFFSET ));
1914+ nrf_timer_cc_set (EVENT_TIMER , HAL_EVENT_TIMER_PA_LNA_PDN_CC_OFFSET ,
1915+ (trx_us - NRF_GPIO_PDN_OFFSET ));
19151916 hal_radio_nrf_ppi_channels_enable (BIT (HAL_ENABLE_PALNA_PPI ) |
19161917 BIT (HAL_DISABLE_PALNA_PPI ) |
19171918 BIT (HAL_ENABLE_FEM_PPI ) |
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