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boards: microchip: PIC32CM_JH: configure clock source and frequency
Configure CPU clock using FDPLL, sourced from XOSC to achieve 48Mhz. Signed-off-by: Sunil Abraham <[email protected]>
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2 files changed

+68
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boards/microchip/pic32c/pic32cm_jh01_cpro/pic32cm_jh01_cpro.dts

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@@ -56,5 +56,71 @@
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};
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&cpu0 {
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clock-frequency = <4000000>;
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clock-frequency = <48000000>;
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};
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&clock {
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compatible = "microchip,pic32cm-jh-clock";
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/* If cpu sourced from osc48m, use 3 for CPU frequency above 24Mhz */
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flash-wait-states = <2>;
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xosc: xosc {
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compatible = "microchip,pic32cm-jh-xosc";
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xosc-frequency = <32000000>;
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xosc-en = <1>;
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xosc-xtal-en = <1>;
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xosc-run-in-standby-en = <1>;
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};
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fdpll: fdpll {
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compatible = "microchip,pic32cm-jh-fdpll";
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fdpll-xosc-clock-divider = <15>;
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fdpll-divider-ratio-frac = <0>;
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fdpll-divider-ratio-int = <95>;
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fdpll-output-prescalar = "div2";
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fdpll-src = "xosc";
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fdpll-run-in-standby-en = <1>;
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fdpll-en = <1>;
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};
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xosc32k: xosc32k {
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compatible = "microchip,pic32cm-jh-xosc32k";
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xosc32k-32khz-en = <1>;
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xosc32k-xtal-en = <1>;
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xosc32k-startup-time = "122-us";
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xosc32k-run-in-standby-en = <1>;
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xosc32k-en = <1>;
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};
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osc32k: osc32k {
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compatible = "microchip,pic32cm-jh-osc32k";
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osc32k-32khz-en = <1>;
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osc32k-startup-time = "183-us";
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osc32k-run-in-standby-en = <1>;
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osc32k-en = <0>;
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};
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gclkgen: gclkgen {
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compatible = "microchip,pic32cm-jh-gclkgen";
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gclkgen0 {
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subsystem = <CLOCK_MCHP_GCLKGEN_ID_GEN0>;
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gclkgen-div-factor = <1>;
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gclkgen-run-in-standby-en = <1>;
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gclkgen-src = "fdpll";
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gclkgen-en = <1>;
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};
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};
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gclkperiph: gclkperiph {
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compatible = "microchip,pic32cm-jh-gclkperiph";
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#clock-cells = <1>;
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sercom2 {
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subsystem = <CLOCK_MCHP_GCLKPERIPH_ID_SERCOM4_CORE>;
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gclkperiph-src = "gclk0";
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gclkperiph-en = <1>;
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};
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};
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};

boards/microchip/pic32c/pic32cm_jh01_cpro/pic32cm_jh01_cpro.yaml

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@@ -12,4 +12,5 @@ ram: 64
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supported:
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- gpio
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- pinctrl
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- clock
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vendor: microchip

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