|
73 | 73 | clocks = <&hclk>;
|
74 | 74 | };
|
75 | 75 |
|
| 76 | + prortcclk: prortcclk { |
| 77 | + compatible = "fixed-factor-clock"; |
| 78 | + #clock-cells = <0>; |
| 79 | + clocks = <&lfrco>; |
| 80 | + }; |
| 81 | + |
76 | 82 | rtccclk: rtccclk {
|
77 | 83 | compatible = "fixed-factor-clock";
|
78 | 84 | #clock-cells = <0>;
|
|
85 | 91 | clocks = <&hfrcodpll>;
|
86 | 92 | };
|
87 | 93 |
|
| 94 | + systickclk: systickclk { |
| 95 | + compatible = "fixed-factor-clock"; |
| 96 | + #clock-cells = <0>; |
| 97 | + clocks = <&hclk>; |
| 98 | + }; |
| 99 | + |
88 | 100 | traceclk: traceclk {
|
89 | 101 | compatible = "fixed-factor-clock";
|
90 | 102 | #clock-cells = <0>;
|
|
113 | 125 | reg = <0>;
|
114 | 126 | #address-cells = <1>;
|
115 | 127 | #size-cells = <1>;
|
| 128 | + /* |
| 129 | + * The minimum residency and exit latency is managed by sl_power_manager |
| 130 | + * on S2 devices. |
| 131 | + */ |
| 132 | + cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em4>; |
116 | 133 | device_type = "cpu";
|
117 | 134 |
|
118 | 135 | itm: itm@e0000000 {
|
|
125 | 142 | reg = <0xe000ed90 0x40>;
|
126 | 143 | };
|
127 | 144 | };
|
| 145 | + |
| 146 | + power-states { |
| 147 | + pstate_em1: em1 { |
| 148 | + compatible = "zephyr,power-state"; |
| 149 | + power-state-name = "runtime-idle"; |
| 150 | + }; |
| 151 | + |
| 152 | + pstate_em2: em2 { |
| 153 | + compatible = "zephyr,power-state"; |
| 154 | + power-state-name = "suspend-to-idle"; |
| 155 | + }; |
| 156 | + |
| 157 | + pstate_em4: em4 { |
| 158 | + compatible = "zephyr,power-state"; |
| 159 | + power-state-name = "soft-off"; |
| 160 | + status = "disabled"; |
| 161 | + }; |
| 162 | + }; |
128 | 163 | };
|
129 | 164 |
|
130 | 165 | hwinfo: hwinfo {
|
|
386 | 421 | status = "disabled";
|
387 | 422 | };
|
388 | 423 |
|
| 424 | + burtc0: burtc@50064000 { |
| 425 | + compatible = "silabs,gecko-burtc"; |
| 426 | + reg = <0x50064000 0x4000>; |
| 427 | + clocks = <&cmu CLOCK_AUTO CLOCK_BRANCH_EM4GRPACLK>; |
| 428 | + interrupt-names = "burtc"; |
| 429 | + interrupts = <18 2>; |
| 430 | + status = "disabled"; |
| 431 | + }; |
| 432 | + |
389 | 433 | i2c1: i2c@50068000 {
|
390 | 434 | compatible = "silabs,i2c";
|
391 | 435 | reg = <0x50068000 0x4000>;
|
|
398 | 442 | status = "disabled";
|
399 | 443 | };
|
400 | 444 |
|
| 445 | + rtcc0: stimer0: rtcc@58000000 { |
| 446 | + compatible = "silabs,gecko-stimer"; |
| 447 | + reg = <0x58000000 0x4000>; |
| 448 | + clock-frequency = <32768>; |
| 449 | + clocks = <&cmu CLOCK_AUTO CLOCK_BRANCH_RTCCCLK>; |
| 450 | + interrupt-names = "rtcc"; |
| 451 | + interrupts = <10 2>; |
| 452 | + prescaler = <1>; |
| 453 | + status = "disabled"; |
| 454 | + }; |
| 455 | + |
401 | 456 | letimer0: letimer@5a000000 {
|
402 | 457 | compatible = "silabs,series2-letimer";
|
403 | 458 | reg = <0x5a000000 0x4000>;
|
|
413 | 468 | };
|
414 | 469 | };
|
415 | 470 |
|
| 471 | + adc0: adc@5a004000 { |
| 472 | + compatible = "silabs,gecko-iadc"; |
| 473 | + reg = <0x5a004000 0x4000>; |
| 474 | + #io-channel-cells = <1>; |
| 475 | + clocks = <&cmu CLOCK_AUTO CLOCK_BRANCH_IADCCLK>; |
| 476 | + interrupt-names = "iadc"; |
| 477 | + interrupts = <50 2>; |
| 478 | + status = "disabled"; |
| 479 | + }; |
| 480 | + |
416 | 481 | acmp0: acmp@5a008000 {
|
417 | 482 | compatible = "silabs,acmp";
|
418 | 483 | reg = <0x5a008000 0x4000>;
|
|
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