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boards: imx93_evk: add board.c to control board muxes
i.MX 93 EVK has a series of digital MUXes controlled by ADP5585 GPIO expander. This commit adds board level initialization to such MUXes to control these MUXes. Signed-off-by: Chekhov Ma <[email protected]>
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boards/nxp/imx93_evk/CMakeLists.txt

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# SPDX-License-Identifier: Apache-2.0
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zephyr_library()
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zephyr_library_sources(board.c)

boards/nxp/imx93_evk/Kconfig

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# i.MX 93 EVK board configuration
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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MIMX93_EVK_EXP_SEL_INIT
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bool "Configure i.MX 93 EVK board mux control during init"
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default n
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config BOARD_MIMX93_EVK_EXP_SEL_INIT_PRIO
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int "i.MX 93 EVK board mux control init priority"
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default 60
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module = BOARD_MIMX93_EVK
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module-str = Board Control
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source "subsys/logging/Kconfig.template.log_config"

boards/nxp/imx93_evk/Kconfig.defconfig

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if BOARD_IMX93_EVK_MIMX9352_A55
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if BOARD_MIMX93_EVK_EXP_SEL_INIT
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# Enable I2C, MFD, MFD_APD5585 and GPIO_ADP5585
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config GPIO
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default y
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config MFD_ADP5585_INIT_PRIORITY
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default 55
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config GPIO_ADP5585_INIT_PRIORITY
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default 56
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endif # BOARD_MIMX93_EVK_EXP_SEL_INIT
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if NETWORKING
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config NET_L2_ETHERNET

boards/nxp/imx93_evk/board.c

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/**
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* Copyright 2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/init.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/drivers/gpio.h>
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LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_MIMX93_EVK_LOG_LEVEL);
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#if DT_HAS_COMPAT_STATUS_OKAY(imx93evk_exp_sel) && \
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IS_ENABLED(CONFIG_BOARD_MIMX93_EVK_EXP_SEL_INIT)
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#define BOARD_EXP_SEL_NODE DT_COMPAT_GET_ANY_STATUS_OKAY(imx93evk_exp_sel)
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#define BOARD_EXP_SEL_MUX_A (0U)
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#define BOARD_EXP_SEL_MUX_B (1U)
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static int board_init_exp_sel(void)
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{
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int rc = 0;
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const struct gpio_dt_spec mux =
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GPIO_DT_SPEC_GET(BOARD_EXP_SEL_NODE, mux_gpios);
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uint32_t pin_state = DT_ENUM_IDX(BOARD_EXP_SEL_NODE, mux);
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if (!gpio_is_ready_dt(&mux)) {
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LOG_ERR("EXP_SEL Pin port is not ready");
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return -ENODEV;
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}
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#if defined(CONFIG_CAN)
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if (pin_state != BOARD_EXP_SEL_MUX_A) {
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LOG_WRN("CAN is enabled, EXP_SEL overrides to A");
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pin_state = BOARD_EXP_SEL_MUX_A;
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}
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#endif /* CONFIG_CAN */
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rc = gpio_pin_configure_dt(&mux, pin_state);
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if (rc) {
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LOG_ERR("Write EXP_SEL Pin error %d", rc);
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return rc;
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}
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LOG_INF("EXP_SEL mux %c with priority %d",
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pin_state ? 'B' : 'A',
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CONFIG_BOARD_MIMX93_EVK_EXP_SEL_INIT_PRIO
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);
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return 0;
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}
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SYS_INIT(board_init_exp_sel, POST_KERNEL, CONFIG_BOARD_MIMX93_EVK_EXP_SEL_INIT_PRIO);
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#endif
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/*
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* DT_HAS_COMPAT_STATUS_OKAY(imx93evk_exp_sel) && \
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* IS_ENABLED(CONFIG_BOARD_MIMX93_EVK_EXP_SEL_INIT)
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*/
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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: |
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The i.MX 93 EVK boards has a series of MUXes that selects between 2 pin
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functions. They are controlled by EXP_SEL signal from gpio_exp0, an
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ADP5585 GPIO expander.
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compatible: "imx93evk-exp-sel"
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include: base.yaml
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properties:
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mux-gpios:
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type: phandle-array
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required: true
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description: Pin used to select the MUX
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mux:
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type: string
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required: true
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enum:
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- "A"
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- "B"
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description: MUX choice

boards/nxp/imx93_evk/imx93_evk_mimx9352_a55.dts

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gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
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};
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};
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board_exp_sel: board-exp-sel {
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compatible = "imx93evk-exp-sel";
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mux-gpios = <&gpio_exp0 4 GPIO_ACTIVE_HIGH>;
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mux = "A";
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};
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};
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&enet {
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};
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&lpi2c2 {
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status = "disabled";
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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pinctrl-0 = <&i2c2_default>;
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pinctrl-names = "default";
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mfd0:adp5585@34 {
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compatible = "adi,adp5585";
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reg = <0x34>;
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status = "disabled";
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status = "okay";
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gpio_exp0: adp5585_gpio {
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compatible = "adi,adp5585-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <13>;
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gpio-reserved-ranges = <5 3>;
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status = "okay";
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/*
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* This device has non-contiguous gpio range:
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* GPIO Pin R0~R4 are gpio0~4
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* GPIO Pin C0~C4 are gpio8~12
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*/
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gpiohog_exp_sel: exp-sel-hog {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_HIGH>;
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line-name = "exp_sel";
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output-low;
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};
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status = "disabled";
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};
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};
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};

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