soc: esp32: refactor esp32_net

SOC_ESP32_NET is now SOC_ESP32_APPCPU, following espressif's
naming convention in the same manner as ESP32S3 app cpu.

SOC_ESP32_APPCU is now a subset of SOC_SERIES_ESP32.

This commit also changes the necessary files, samples and tests
for bisect purposes.

Signed-off-by: Lucas Tamborrino <[email protected]>

Author: LucasTambor

boards/xtensa/esp32_devkitc_wroom/Kconfig.board

@@ -5,6 +5,10 @@ config BOARD_ESP32_DEVKITC_WROOM
 	bool "ESP32-DEVKITC-WROOM Development Board"
 	depends on SOC_SERIES_ESP32
 
+config BOARD_ESP32_DEVKITC_WROOM_APPCPU
+	bool "ESP32 Board configuration for APPCPU (core 1)."
+	depends on SOC_SERIES_ESP32 && SOC_ESP32_APPCPU
+
 choice SOC_PART_NUMBER
 	default SOC_ESP32_WROOM_32UE_N4
 endchoice

boards/xtensa/esp32_devkitc_wroom/Kconfig.defconfig

@@ -3,12 +3,10 @@
 # Copyright (c) 2017 Intel Corporation
 # SPDX-License-Identifier: Apache-2.0
 
+if BOARD_ESP32_DEVKITC_WROOM
+
 config BOARD
 	default "esp32_devkitc_wroom"
-	depends on BOARD_ESP32_DEVKITC_WROOM
-
-config ENTROPY_GENERATOR
-	default y
 
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
@@ -19,3 +17,21 @@ config HEAP_MEM_POOL_ADD_SIZE_BOARD
 choice BT_HCI_BUS_TYPE
 	default BT_ESP32 if BT
 endchoice
+
+endif # BOARD_ESP32_DEVKITC_WROOM
+
+if BOARD_ESP32_DEVKITC_WROOM_APPCPU
+
+config BOARD
+	default "esp32_devkitc_wroom_appcpu"
+
+config HEAP_MEM_POOL_ADD_SIZE_BOARD
+	default 4096
+
+config KERNEL_BIN_NAME
+	default "esp32_net_firmware"
+
+endif # BOARD_ESP32_DEVKITC_WROOM_APPCPU
+
+config ENTROPY_GENERATOR
+	default y

boards/xtensa/esp32_devkitc_wroom/doc/index.rst

@@ -47,6 +47,12 @@ The features include the following:
 
     ESP32-DevKitC-WROOM-32D DK
 
+Asymmetric Multiprocessing (AMP)
+********************************
+
+ESP32-DEVKITC-WROOM allows 2 different applications to be executed in ESP32 SoC. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode
+and/or exchanging data over OpenAMP framework. See :ref:`ipc_samples` folder as code reference.
+
 Supported Features
 ==================
 

boards/xtensa/esp32_net/esp32_net.dts renamed to boards/xtensa/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.dts

@@ -1,18 +1,20 @@
 /*
- * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+ * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 /dts-v1/;
 
-#include <espressif/esp32/esp32_net.dtsi>
+#include <espressif/esp32/esp32_appcpu.dtsi>
 
 / {
-	model = "esp32_net";
-	compatible = "espressif,esp32_net";
+	model = "esp32_wroom_appcpu";
+	compatible = "espressif,esp32_appcpu";
 
 	chosen {
 		zephyr,sram = &sram0;
+		zephyr,ipc_shm = &shm0;
+		zephyr,ipc = &ipm0;
 	};
 };
 

boards/xtensa/esp32_net/esp32_net.yaml renamed to boards/xtensa/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu.yaml

@@ -1,12 +1,10 @@
-identifier: esp32_net
-name: ESP32_NET
+identifier: esp32_devkitc_wroom_appcpu
+name: ESP32 DEVKITC WROOM APPCPU
 type: mcu
 arch: xtensa
 toolchain:
   - zephyr
 supported:
-  - gpio
-  - i2c
   - uart
 testing:
   ignore_tags:
@@ -19,4 +17,11 @@ testing:
     - logging
     - kernel
     - pm
+    - gpio
+    - crypto
+    - eeprom
+    - heap
+    - cmsis_rtos
+    - jwt
+    - zdsp
 vendor: espressif

boards/xtensa/esp32_devkitc_wroom/esp32_devkitc_wroom_appcpu_defconfig

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SOC_SERIES_ESP32=y
+CONFIG_SOC_ESP32_APPCPU=y
+CONFIG_BOARD_ESP32_DEVKITC_WROOM_APPCPU=y
+
+CONFIG_MAIN_STACK_SIZE=2048
+CONFIG_CLOCK_CONTROL=y
+CONFIG_MINIMAL_LIBC=y

boards/xtensa/esp32_devkitc_wrover/Kconfig.board

@@ -5,6 +5,10 @@ config BOARD_ESP32_DEVKITC_WROVER
 	bool "ESP32-DEVKITC-WROVER-E Development board"
 	depends on SOC_SERIES_ESP32
 
+config BOARD_ESP32_DEVKITC_WROVER_APPCPU
+	bool "ESP32 Board configuration for APPCPU (core 1)."
+	depends on SOC_SERIES_ESP32 && SOC_ESP32_APPCPU
+
 choice SOC_PART_NUMBER
 	default SOC_ESP32_WROVER_E_N4R8
 endchoice

boards/xtensa/esp32_devkitc_wrover/Kconfig.defconfig

@@ -1,12 +1,10 @@
 # Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
 # SPDX-License-Identifier: Apache-2.0
 
+if BOARD_ESP32_DEVKITC_WROVER
+
 config BOARD
 	default "esp32_devkitc_wrover"
-	depends on BOARD_ESP32_DEVKITC_WROVER
-
-config ENTROPY_GENERATOR
-	default y
 
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
@@ -17,3 +15,20 @@ config HEAP_MEM_POOL_ADD_SIZE_BOARD
 choice BT_HCI_BUS_TYPE
 	default BT_ESP32 if BT
 endchoice
+
+endif # BOARD_ESP32_DEVKITC_WROVER
+
+if BOARD_ESP32_DEVKITC_WROVER_APPCPU
+
+config BOARD
+	default "esp32_devkitc_wrover_appcpu"
+
+config HEAP_MEM_POOL_ADD_SIZE_BOARD
+	default 4096
+
+config KERNEL_BIN_NAME
+	default "esp32_net_firmware"
+endif
+
+config ENTROPY_GENERATOR
+	default y

boards/xtensa/esp32_devkitc_wrover/doc/index.rst

@@ -47,6 +47,12 @@ The features include the following:
 
     ESP32-DevKitC-WROVER-IE
 
+Asymmetric Multiprocessing (AMP)
+********************************
+
+ESP32-DEVKITC-WROVER allows 2 different applications to be executed in ESP32 SoC. Due to its dual-core architecture, each core can be enabled to execute customized tasks in stand-alone mode
+and/or exchanging data over OpenAMP framework. See :ref:`ipc_samples` folder as code reference.
+
 Supported Features
 ==================
 

boards/xtensa/esp32_devkitc_wrover/esp32_devkitc_wrover_appcpu.dts

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32/esp32_appcpu.dtsi>
+
+/ {
+	model = "esp32_wrover_appcpu";
+	compatible = "espressif,esp32_appcpu";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,ipc_shm = &shm0;
+		zephyr,ipc = &ipm0;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&cpu1 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&trng0 {
+	status = "okay";
+};