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dts/bindings/clock: st-stm32(wb)-rcc: Clarify 'clock-frequency' meaning
Rework bindings documentation to clearly illustrate the role of ahb (and cpu1) prescaler which defines the actual core clock frequency, and not only a bus frequency. Signed-off-by: Erwan Gouriou <[email protected]>
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dts/bindings/clock/st,stm32-rcc.yaml

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System clock source should be selected amongst the clock nodes available in "clocks"
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node (typically 'clk_hse, clk_hsi', 'pll', ...).
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As part of this node configuration, SYSCLK frequency should also be defined, using
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"clock-frequency" property.
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Last, bus clocks (typically HCLK, PCLK1, PCLK2) should be configured using matching
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Core clock frequency should also be defined, using "clock-frequency" property.
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Note:
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Core clock frequency = SYSCLK / AHB prescaler
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Last, peripheral bus clocks (typically PCLK1, PCLK2) should be configured using matching
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prescaler properties.
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Here is an example of correctly configured rcc node:
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&rcc {
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clocks = <&pll>; /* Set pll as SYSCLK source */
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clock-frequency = <DT_FREQ_M(80)>; /* SYSCLK runs at 80MHz */
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ahb-prescaler = <1>;
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clocks = <&pll>; /* Select 80MHz pll as SYSCLK source */
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ahb-prescaler = <2>;
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clock-frequency = <DT_FREQ_M(40)>; /* = SYSCLK / AHB prescaler */
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apb1-presacler = <1>;
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apb2-presacler = <1>;
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}
@@ -67,8 +68,8 @@ properties:
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description: |
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AHB prescaler. Sets a HCLK frequency (feeding Cortex-M Systick)
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lower than SYSCLK frequency (actual core frequency).
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AHB prescaler. Defines actual core clock frequency (HCLK)
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based on system frequency input.
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The HCLK clocks CPU, AHB, memories and DMA.
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apb1-prescaler:

dts/bindings/clock/st,stm32wb-rcc.yaml

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description: |
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CPU1 prescaler. Sets a HCLK1 frequency (feeding Cortex-M Systick)
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lower than SYSCLK frequency (actual core frequency).
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CPU1 prescaler. Sets a HCLK1 frequency (Core frequency)
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lower than SYSCLK frequency.
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The HCLK1 clocks CPU1, AHB1, AHB2, AHB3 and SRAM1.
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cpu2-prescaler:

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