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rbudai98kartben
rbudai98
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kartben
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drivers: gpio: add max14917
MAX14917 is an eight high-side switch, specified to deliver up to 700mA (min) continuous current per channel. The high-side switches have on-resistance of 120mΩ (typ) at 25°C ambient temperature Signed-off-by: Robert Budai <[email protected]>
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‎drivers/gpio/CMakeLists.txt

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@@ -45,6 +45,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_LMP90XXX gpio_lmp90xxx.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_LPC11U6X gpio_lpc11u6x.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX14906 gpio_max14906.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX14916 gpio_max14916.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX14917 gpio_max14917.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX22017 gpio_max22017.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX22190 gpio_max22190.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_MAX32 gpio_max32.c)

‎drivers/gpio/Kconfig

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@@ -135,6 +135,7 @@ source "drivers/gpio/Kconfig.lmp90xxx"
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source "drivers/gpio/Kconfig.lpc11u6x"
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source "drivers/gpio/Kconfig.max14906"
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source "drivers/gpio/Kconfig.max14916"
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source "drivers/gpio/Kconfig.max14917"
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source "drivers/gpio/Kconfig.max22017"
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source "drivers/gpio/Kconfig.max22190"
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source "drivers/gpio/Kconfig.max32"

‎drivers/gpio/Kconfig.max14917

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# Copyright (c) 2025 Analog Devices Inc.
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# SPDX-License-Identifier: Apache-2.0
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# MAX14917 GPIO configuration options
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menuconfig GPIO_MAX14917
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bool "MAX14917 GPIO driver"
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default y
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select CRC
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depends on DT_HAS_ADI_MAX14917_GPIO_ENABLED && SPI
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help
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Enable MAX14917 octal industrial digital
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output with diagnostics
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config GPIO_MAX14917_INIT_PRIORITY
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int "Driver init priority"
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default 99
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depends on GPIO_MAX14917
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help
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Device driver initialization priority.

‎drivers/gpio/gpio_max14917.c

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/*
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* Copyright (c) 2025 Analog Devices Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/sys/crc.h>
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#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(gpio_max14917);
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include "gpio_max14917.h"
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#define DT_DRV_COMPAT adi_max14917_gpio
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static int max14917_reg_trans_spi_diag(const struct device *dev)
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{
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int ret = 0;
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uint8_t crc;
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uint8_t local_tx_buff[MAX14917_MAX_PKT_SIZE] = {0};
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uint8_t local_rx_buff[MAX14917_MAX_PKT_SIZE] = {0};
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struct max14917_data *data = dev->data;
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const struct max14917_config *config = dev->config;
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struct spi_buf tx_buf = {
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.buf = &local_tx_buff,
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.len = config->pkt_size,
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};
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const struct spi_buf_set tx = {.buffers = &tx_buf, .count = 1};
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struct spi_buf rx_buf = {
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.buf = &local_rx_buff,
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.len = config->pkt_size,
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};
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const struct spi_buf_set rx = {.buffers = &rx_buf, .count = 1};
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local_tx_buff[0] = data->gpios_ON;
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/* If CRC enabled calculate it */
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if (config->crc_en) {
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crc = crc8(&local_tx_buff[0], 1, MAX14917_CRC_POLY, MAX14917_CRC_INI_VAL, false);
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local_tx_buff[1] = (crc & MAX14917_CRC_MASK);
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}
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/* Perform SPI transaction */
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ret = spi_transceive_dt(&config->spi, &tx, &rx);
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if (ret) {
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LOG_ERR("SPI transfer failed");
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return ret;
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}
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/* If CRC enabled check it */
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if (config->crc_en) {
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crc = crc8(&local_tx_buff[0], 1, MAX14917_CRC_POLY, MAX14917_CRC_INI_VAL, false);
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crc = (crc & MAX14917_CRC_MASK);
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if (crc != (local_rx_buff[1] & 0x1F)) {
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LOG_ERR("READ CRC ERR (%d)-(%d)\n", crc, (local_rx_buff[1] & 0x1F));
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return -EINVAL;
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}
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/* Set error flags in device data */
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data->comm_err = (local_rx_buff[1] & MAX14917_COMM_ERR);
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data->verr = (local_rx_buff[1] & MAX14917_VERR);
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data->therm_err = (local_rx_buff[1] & MAX14917_THERM_ERR);
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}
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data->gpios_fault = local_rx_buff[0];
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return 0;
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}
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static int max14917_fault_check(const struct device *dev)
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{
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int ret;
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const struct max14917_data *data = dev->data;
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const struct max14917_config *config = dev->config;
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if (gpio_pin_get_dt(&config->fault_gpio)) {
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LOG_DBG("FAULT GPIO is high");
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}
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/* Update error flags */
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ret = max14917_reg_trans_spi_diag(dev);
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if (ret) {
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return ret;
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}
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if (data->comm_err) {
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LOG_DBG("COMMERR flag is active");
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}
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if (data->verr) {
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LOG_DBG("VERR flag is active");
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}
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if (data->therm_err) {
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LOG_DBG("THERMERR flag is active");
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}
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for (int i = 0; i < MAX14917_CHANNELS; i++) {
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if (data->gpios_fault & BIT(i)) {
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LOG_DBG("Channel %d has a fault", i);
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}
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}
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return 0;
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}
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static int gpio_max14917_init(const struct device *dev)
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{
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struct max14917_data *data = dev->data;
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const struct max14917_config *config = dev->config;
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int err = 0;
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LOG_DBG(" --- GPIO max14917 init IN ---");
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if (!spi_is_ready_dt(&config->spi)) {
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LOG_ERR("SPI bus is not ready\n");
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return -ENODEV;
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}
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/* Output GPIOS */
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/* setup EN gpio - normal low */
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if (!gpio_is_ready_dt(&config->en_gpio)) {
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LOG_ERR("EN GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->en_gpio, GPIO_OUTPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure EN GPIO");
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return err;
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}
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/* setup SYNC gpio - normal low */
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if (!gpio_is_ready_dt(&config->sync_gpio)) {
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LOG_ERR("SYNC GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->sync_gpio, GPIO_OUTPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure SYNC GPIO");
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return err;
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}
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/* setup CRCEN gpio - normal low */
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if (!gpio_is_ready_dt(&config->crcen_gpio)) {
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LOG_ERR("CRCEN GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->crcen_gpio, GPIO_OUTPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure CRCEN GPIO");
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return err;
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}
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/* Input GPIOS */
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/* setup VDDOK gpio - normal low */
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if (!gpio_is_ready_dt(&config->vddok_gpio)) {
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LOG_ERR("VDDOK GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->vddok_gpio, GPIO_INPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure VDDOK GPIO");
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return err;
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}
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/* setup READY gpio - normal low */
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if (!gpio_is_ready_dt(&config->ready_gpio)) {
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LOG_ERR("VDDOK READY device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->ready_gpio, GPIO_INPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure READY GPIO");
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return err;
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}
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/* setup COMERR gpio - normal low */
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if (!gpio_is_ready_dt(&config->comerr_gpio)) {
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LOG_ERR("COMERR GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->comerr_gpio, GPIO_INPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure COMERR GPIO");
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return err;
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}
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/* setup FAULT gpio - normal low */
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if (!gpio_is_ready_dt(&config->fault_gpio)) {
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LOG_ERR("FAULT GPIO device not ready");
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return -ENODEV;
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}
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err = gpio_pin_configure_dt(&config->fault_gpio, GPIO_INPUT);
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if (err < 0) {
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LOG_ERR("Failed to configure FAULT GPIO");
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return err;
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}
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err = gpio_pin_set_dt(&config->en_gpio, 1);
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if (err) {
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return err;
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}
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err = gpio_pin_set_dt(&config->sync_gpio, 1);
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if (err) {
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return err;
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}
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if (config->crc_en) {
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err = gpio_pin_set_dt(&config->crcen_gpio, 1);
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} else {
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err = gpio_pin_set_dt(&config->crcen_gpio, 0);
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}
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if (err) {
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return err;
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}
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/* Initialize satus and fault flags to 0 */
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data->gpios_ON = 0;
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data->gpios_fault = 0;
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err = max14917_fault_check(dev);
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return err;
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}
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static int gpio_max14917_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
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{
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int err = 0;
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if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
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return -ENOTSUP;
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}
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if ((flags & GPIO_SINGLE_ENDED) != 0) {
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return -ENOTSUP;
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}
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0) {
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return -ENOTSUP;
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}
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if (flags & GPIO_INT_ENABLE) {
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return -ENOTSUP;
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}
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switch (flags & GPIO_DIR_MASK) {
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case GPIO_OUTPUT:
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break;
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case GPIO_INPUT:
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default:
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LOG_ERR("NOT SUPPORTED OPTION!");
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return -ENOTSUP;
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}
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return err;
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}
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static int gpio_max14917_port_get_raw(const struct device *dev, gpio_port_value_t *value)
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{
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int ret;
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const struct max14917_data *data = dev->data;
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ret = max14917_fault_check(dev);
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if (ret) {
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return ret;
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}
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*value = data->gpios_ON;
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return 0;
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}
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static int gpio_max14917_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins)
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{
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int ret;
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struct max14917_data *data = dev->data;
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ret = max14917_fault_check(dev);
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if (ret) {
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return ret;
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}
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data->gpios_ON = data->gpios_ON | pins;
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return max14917_reg_trans_spi_diag(dev);
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}
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static int gpio_max14917_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins)
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{
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int ret;
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struct max14917_data *data = dev->data;
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ret = max14917_fault_check(dev);
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if (ret) {
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return ret;
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}
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data->gpios_ON = data->gpios_ON & ~pins;
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return max14917_reg_trans_spi_diag(dev);
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}
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static int gpio_max14917_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
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{
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int ret;
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struct max14917_data *data = dev->data;
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ret = max14917_fault_check(dev);
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if (ret) {
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return ret;
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}
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data->gpios_ON ^= pins;
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return max14917_reg_trans_spi_diag(dev);
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}
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static DEVICE_API(gpio, gpio_max14917_api) = {
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.pin_configure = gpio_max14917_config,
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.port_get_raw = gpio_max14917_port_get_raw,
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.port_set_bits_raw = gpio_max14917_port_set_bits_raw,
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.port_clear_bits_raw = gpio_max14917_port_clear_bits_raw,
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.port_toggle_bits = gpio_max14917_port_toggle_bits,
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};
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#define GPIO_MAX14917_DEVICE(id) \
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static const struct max14917_config max14917_##id##_cfg = { \
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.spi = SPI_DT_SPEC_INST_GET(id, SPI_OP_MODE_MASTER | SPI_WORD_SET(8U), 0U), \
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.vddok_gpio = GPIO_DT_SPEC_INST_GET(id, vddok_gpios), \
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.ready_gpio = GPIO_DT_SPEC_INST_GET(id, ready_gpios), \
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.comerr_gpio = GPIO_DT_SPEC_INST_GET(id, comerr_gpios), \
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.fault_gpio = GPIO_DT_SPEC_INST_GET(id, fault_gpios), \
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.en_gpio = GPIO_DT_SPEC_INST_GET(id, en_gpios), \
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.sync_gpio = GPIO_DT_SPEC_INST_GET(id, sync_gpios), \
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.crcen_gpio = GPIO_DT_SPEC_INST_GET(id, crcen_gpios), \
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.crc_en = DT_INST_PROP(id, crc_en), \
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.pkt_size = (DT_INST_PROP(id, crc_en) & 0x1) ? 2 : 1, \
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}; \
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\
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static struct max14917_data max14917_##id##_data; \
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\
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DEVICE_DT_INST_DEFINE(id, &gpio_max14917_init, NULL, &max14917_##id##_data, \
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&max14917_##id##_cfg, POST_KERNEL, \
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CONFIG_GPIO_MAX14917_INIT_PRIORITY, &gpio_max14917_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_MAX14917_DEVICE)

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