boards: st: add pllsai for ltdc & mipi-dsi support on stm32f469 disco

Extension of support of pllsai for display configuration of stm32f469
discovery board. Enable Display panel through LTDC & DSI-HOST
blocks. Enable Touch screen. Enable FMC/SDRAM for Framebuffer.

Signed-off-by: Philippe Peurichard <[email protected]>

Author: phildefer

boards/st/stm32f469i_disco/CMakeLists.txt

@@ -0,0 +1,9 @@
+#
+# Copyright 2025 P. Peurichard
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+# Add custom linker section to relocate framebuffers to PSRAM
+zephyr_linker_sources_ifdef(CONFIG_LV_Z_VDB_CUSTOM_SECTION
+  SECTIONS dc_ram.ld)

boards/st/stm32f469i_disco/Kconfig.defconfig

@@ -9,5 +9,36 @@ config SPI_STM32_INTERRUPT
 	default y
 	depends on SPI
 
+if LVGL
 
+# Double frame buffer maintained by lvgl.
+config STM32_LTDC_FB_NUM
+	default 0
+
+config LV_Z_DOUBLE_VDB
+	default y
+
+config LV_Z_VDB_CUSTOM_SECTION
+	default y
+
+config LV_Z_FULL_REFRESH
+	default y
+
+config INPUT
+	default y
+
+config LV_Z_BITS_PER_PIXEL
+	default 32
+
+config LV_DPI_DEF
+	default 128
+
+config LV_Z_FLUSH_THREAD
+	default y
+
+choice LV_COLOR_DEPTH
+	default LV_COLOR_DEPTH_16
+endchoice
+
+endif #LVGL
 endif # BOARD_STM32F469I_DISCO

boards/st/stm32f469i_disco/dc_ram.ld

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2025 P. Peurichard
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram1), okay)
+GROUP_START(SDRAM1)
+
+	SECTION_PROLOGUE(_STM32_SDRAM1_SECTION_NAME, (NOLOAD),)
+	{
+		*(.lvgl_buf)
+	} GROUP_LINK_IN(SDRAM1)
+
+GROUP_END(SDRAM1)
+#endif

boards/st/stm32f469i_disco/stm32f469i_disco.conf

@@ -0,0 +1,5 @@
+# Copyright (c) 2025 Philippe Peurichard <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+# Initialize after LTDC and MIPI-DSI
+CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=87

boards/st/stm32f469i_disco/stm32f469i_disco.dts

@@ -20,6 +20,8 @@
 		zephyr,sram = &sram0;
 		zephyr,flash = &flash0;
 		zephyr,ccm = &ccm0;
+		zephyr,display = &ltdc;
+		zephyr,touch = &ft5336;
 	};
 
 	sdram1: sdram@c0000000 {
@@ -53,6 +55,12 @@
 		};
 	};
 
+	lvgl_pointer {
+		compatible = "zephyr,lvgl-pointer-input";
+		input = <&ft5336>;
+		invert-y;
+	};
+
 	gpio_keys {
 		compatible = "gpio-keys";
 
@@ -86,6 +94,17 @@
 	mul-n = <336>;
 	div-p = <2>;
 	div-q = <7>;
+	div-r = <6>;
+	clocks = <&clk_hse>;
+	status = "okay";
+};
+
+&pllsai {
+	div-m = <8>;
+	mul-n = <266>;
+	div-p = <2>;
+	div-r = <5>;
+	div-divr  = <2>;
 	clocks = <&clk_hse>;
 	status = "okay";
 };
@@ -116,6 +135,13 @@
 	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
 	pinctrl-names = "default";
 	status = "okay";
+
+	ft5336: ft5336@2a {
+		compatible = "focaltech,ft5336";
+		reg = <0x2a>;
+		int-gpios = <&gpioj 5 0>;
+		status = "okay";
+	};
 };
 
 &spi2 {
@@ -199,3 +225,59 @@ zephyr_udc0: &usbotg_fs {
 		};
 	};
 };
+
+&mipi_dsi {
+	status = "okay";
+	otm8009a: otm8009a@0 {
+		status = "okay";
+		compatible = "orisetech,otm8009a";
+		reg = <0x0>;
+		height = <800>;
+		width = <480>;
+		reset-gpios = <&gpioh 7 0>;
+		bl-gpios = <&gpioa 3 0>;
+		data-lanes = <2>;
+		pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
+		rotation = <90>;
+	};
+
+	/* DSI HOST dedicated PLL
+	 * F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
+	 * PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
+	 *     = 8 MHz / 2 * 2 * 125 / 2 / (1<<0) / 8 = 62.5 MHz
+	 */
+	pll-ndiv = <125>;
+	pll-idf = <2>;
+	pll-odf = <0>;
+
+	vs-active-high;
+	hs-active-high;
+	de-active-high;
+};
+
+&ltdc {
+	status = "okay";
+	width = <800>;
+	height = <480>;
+	pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
+	ext-sdram = <&sdram1>;
+	/* orisetech, otm8009a */
+	display-timings {
+		compatible = "zephyr,panel-timing";
+		hsync-active = <0>;
+		vsync-active = <0>;
+		de-active = <0>;
+		pixelclk-active = <0>;
+		hsync-len = <2>;
+		vsync-len = <1>;
+		hback-porch = <34>;
+		vback-porch = <15>;
+		hfront-porch = <34>;
+		vfront-porch = <16>;
+	};
+
+	def-back-color-red = <0>;
+	def-back-color-green = <0>;
+	def-back-color-blue = <0>;
+
+};

boards/st/stm32f469i_disco/stm32f469i_disco_defconfig

@@ -14,3 +14,12 @@ CONFIG_UART_CONSOLE=y
 
 # enable GPIO
 CONFIG_GPIO=y
+
+# Enable External Memory
+CONFIG_MEMC=y
+
+# Configure Display
+CONFIG_STM32_LTDC_ARGB8888=y
+
+# Size Memory Heap pool from Framebuffer
+# CONFIG_HEAP_MEM_POOL_SIZE=131072