soc: polarfire: split into cpu clusters

adrabarek · nashif · commit 166b9bf35acc · 2024-08-28T06:50:40.000-04:00
Split Polarfire SoC into CPU clusters as they have different
capabilities.

Signed-off-by: Andrzej Drabarek &lt;adrabarek@antmicro.com&gt;
diff --git a/boards/beagle/beaglev_fire/Kconfig b/boards/beagle/beaglev_fire/Kconfig
diff --git a/boards/beagle/beaglev_fire/Kconfig.beaglev_fire b/boards/beagle/beaglev_fire/Kconfig.beaglev_fire
@@ -2,4 +2,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_BEAGLEV_FIRE
-	select SOC_POLARFIRE
+	select SOC_POLARFIRE_U54 if BOARD_BEAGLEV_FIRE_POLARFIRE_U54 || \
+				       BOARD_BEAGLEV_FIRE_POLARFIRE_U54_SMP
+	select SOC_POLARFIRE_E51 if BOARD_BEAGLEV_FIRE_POLARFIRE_E51
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi b/boards/beagle/beaglev_fire/beaglev_fire_common.dtsi
@@ -10,22 +10,10 @@
 #include <mem.h>
 
 / {
-	model = "BeagleV-Fire";
+	model = "beagle,beaglev-fire";
 	compatible = "beagle,beaglev-fire", "microchip,mpfs";
 	aliases {
 	};
-
-	chosen {
-		zephyr,console = &uart0;
-		zephyr,shell-uart = &uart0;
-		zephyr,sram = &sram1;
-	};
-};
-
-&uart0 {
-	status = "okay";
-	current-speed = <115200>;
-	clock-frequency = <150000000>;
 };
 
 &gpio2 {
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_defconfig b/boards/beagle/beaglev_fire/beaglev_fire_defconfig
@@ -10,4 +10,3 @@ CONFIG_UART_CONSOLE=y
 CONFIG_XIP=n
 CONFIG_INIT_STACKS=y
 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
-CONFIG_FPU=n
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.dts
@@ -0,0 +1,36 @@
+/dts-v1/;
+#include "beaglev_fire_common.dtsi"
+
+/ {
+	compatible = "beagle,beaglev-fire", "microchip,mpfs";
+
+	cpus {
+		cpu@1 {
+			status = "disabled";
+		};
+
+		cpu@2 {
+			status = "disabled";
+		};
+
+		cpu@3 {
+			status = "disabled";
+		};
+
+		cpu@4 {
+			status = "disabled";
+		};
+	};
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &sram1;
+	};
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <150000000>;
+};
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51.yaml
@@ -1,4 +1,4 @@
-identifier: beaglev_fire
+identifier: beaglev_fire/polarfire/e51
 name: Beagleboard BeagleV-Fire
 type: mcu
 arch: riscv
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51_defconfig b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_e51_defconfig
@@ -0,0 +1,12 @@
+# Copyright (c) 2023 Microchip Technology Inc
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MPFS_HAL=n
+CONFIG_BASE64=y
+CONFIG_INCLUDE_RESET_VECTOR=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_XIP=n
+CONFIG_INIT_STACKS=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+#include "beaglev_fire_common.dtsi"
+
+/ {
+	model = "beagle,beaglev-fire";
+	compatible = "beagle,beaglev-fire", "microchip,mpfs";
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,sram = &sram1;
+	};
+
+	cpus {
+		cpu@0 {
+			status = "disabled";
+		};
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <150000000>;
+};
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54.yaml
@@ -0,0 +1,12 @@
+identifier: beaglev_fire/polarfire/u54
+name: Beagleboard BeagleV-Fire
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+ram: 3840
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+vendor: beagle
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_defconfig b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_defconfig
@@ -0,0 +1,13 @@
+# Copyright (c) 2023 Microchip Technology Inc
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MPFS_HAL=n
+CONFIG_BASE64=y
+CONFIG_INCLUDE_RESET_VECTOR=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_XIP=n
+CONFIG_INIT_STACKS=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+CONFIG_RV_BOOT_HART=1
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.dts
@@ -0,0 +1,19 @@
+/dts-v1/;
+#include "beaglev_fire_polarfire_u54.dts"
+
+/ {
+	model = "beagle,beaglev-fire";
+	compatible = "beagle,beaglev-fire", "microchip,mpfs";
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,sram = &sram1;
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <150000000>;
+};
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp.yaml
@@ -0,0 +1,12 @@
+identifier: beaglev_fire/polarfire/u54/smp
+name: Beagleboard BeagleV-Fire
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+ram: 3840
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+vendor: beagle
diff --git a/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp_defconfig b/boards/beagle/beaglev_fire/beaglev_fire_polarfire_u54_smp_defconfig
@@ -1,3 +1,6 @@
+# Copyright (c) 2023 Microchip Technology Inc
+# SPDX-License-Identifier: Apache-2.0
+
 CONFIG_MPFS_HAL=n
 CONFIG_BASE64=y
 CONFIG_INCLUDE_RESET_VECTOR=y
@@ -7,8 +10,5 @@ CONFIG_UART_CONSOLE=y
 CONFIG_XIP=n
 CONFIG_INIT_STACKS=y
 CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
-CONFIG_GPIO=y
-CONFIG_I2C=y
-CONFIG_SMP=y
 CONFIG_RV_BOOT_HART=1
-CONFIG_MP_MAX_NUM_CPUS=4
+CONFIG_SMP=y
diff --git a/boards/beagle/beaglev_fire/board.yml b/boards/beagle/beaglev_fire/board.yml
@@ -3,3 +3,6 @@ board:
   vendor: beagle
   socs:
   - name: polarfire
+    variants:
+    - name: smp
+      cpucluster: u54
diff --git a/boards/microchip/mpfs_icicle/Kconfig b/boards/microchip/mpfs_icicle/Kconfig
diff --git a/boards/microchip/mpfs_icicle/Kconfig.mpfs_icicle b/boards/microchip/mpfs_icicle/Kconfig.mpfs_icicle
@@ -2,4 +2,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_MPFS_ICICLE
-	select SOC_POLARFIRE
+	select SOC_POLARFIRE_U54 if BOARD_MPFS_ICICLE_POLARFIRE_U54 || \
+				       BOARD_MPFS_ICICLE_POLARFIRE_U54_SMP
+	select SOC_POLARFIRE_E51 if BOARD_MPFS_ICICLE_POLARFIRE_E51
diff --git a/boards/microchip/mpfs_icicle/board.cmake b/boards/microchip/mpfs_icicle/board.cmake
diff --git a/boards/microchip/mpfs_icicle/board.yml b/boards/microchip/mpfs_icicle/board.yml
@@ -4,4 +4,5 @@ board:
   socs:
   - name: polarfire
     variants:
-    - name: 'smp'
+    - name: smp
+      cpucluster: u54
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_common.dtsi b/boards/microchip/mpfs_icicle/mpfs_icicle_common.dtsi
@@ -10,7 +10,7 @@
 #include <mem.h>
 
 / {
-	model = "Microchip PolarFire-SoC Icicle Kit";
+	model = "microchip,mpfs-icicle-kit";
 	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
 	aliases {
 		led0 = &led0;
@@ -19,12 +19,6 @@
 		i2c1 = &i2c1;
 	};
 
-	chosen {
-		zephyr,console = &uart0;
-		zephyr,shell-uart = &uart0;
-		zephyr,sram = &sram1;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51.dts b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51.dts
@@ -0,0 +1,31 @@
+/dts-v1/;
+#include "mpfs_icicle_common.dtsi"
+
+/ {
+	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
+
+	cpus {
+		cpu@1 {
+			status = "disabled";
+		};
+
+		cpu@2 {
+			status = "disabled";
+		};
+
+		cpu@3 {
+			status = "disabled";
+		};
+
+		cpu@4 {
+			status = "disabled";
+		};
+	};
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &sram1;
+	};
+
+};
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51.yaml b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51.yaml
@@ -1,5 +1,5 @@
-identifier: mpfs_icicle
-name: Microchip PolarFire ICICLE kit
+identifier: mpfs_icicle/polarfire/e51
+name: Microchip PolarFire SoC Icicle Kit
 type: mcu
 arch: riscv
 toolchain:
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51_defconfig b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_e51_defconfig
@@ -0,0 +1,15 @@
+# Copyright (c) 2020-2021 Microchip Technology Inc
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MPFS_HAL=n
+CONFIG_BASE64=y
+CONFIG_INCLUDE_RESET_VECTOR=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_XIP=n
+CONFIG_INIT_STACKS=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+# GPIO driver options
+CONFIG_GPIO=y
+CONFIG_I2C=y
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54.dts b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+#include "mpfs_icicle_common.dtsi"
+
+/ {
+	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
+
+	cpus {
+		cpu@0 {
+			status = "disabled";
+		};
+	};
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,sram = &sram1;
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <150000000>;
+};
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54.yaml b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54.yaml
@@ -1,5 +1,5 @@
-identifier: mpfs_icicle/polarfire/smp
-name: Microchip PolarFire ICICLE kit (SMP)
+identifier: mpfs_icicle/polarfire/u54
+name: Microchip PolarFire SoC Icicle Kit
 type: mcu
 arch: riscv
 toolchain:
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_defconfig b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_defconfig
@@ -0,0 +1,16 @@
+# Copyright (c) 2020-2021 Microchip Technology Inc
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MPFS_HAL=n
+CONFIG_BASE64=y
+CONFIG_INCLUDE_RESET_VECTOR=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_XIP=n
+CONFIG_INIT_STACKS=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+CONFIG_RV_BOOT_HART=1
+# GPIO driver options
+CONFIG_GPIO=y
+CONFIG_I2C=y
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp.dts b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+#include "mpfs_icicle_polarfire_u54.dts"
+
+/ {
+	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
+
+	chosen {
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,sram = &sram1;
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <150000000>;
+};
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp.yaml b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp.yaml
@@ -0,0 +1,13 @@
+identifier: mpfs_icicle/polarfire/u54/smp
+name: Microchip PolarFire SoC Icicle Kit
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+ram: 3840
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+    - flash
+vendor: microchip
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp_defconfig b/boards/microchip/mpfs_icicle/mpfs_icicle_polarfire_u54_smp_defconfig
diff --git a/boards/microchip/mpfs_icicle/mpfs_icicle_smp.dts b/boards/microchip/mpfs_icicle/mpfs_icicle_smp.dts
diff --git a/boards/microchip/mpfs_icicle/support/mpfs250t.resc b/boards/microchip/mpfs_icicle/support/mpfs250t.resc
diff --git a/soc/microchip/miv/polarfire/Kconfig b/soc/microchip/miv/polarfire/Kconfig
diff --git a/soc/microchip/miv/polarfire/Kconfig.defconfig b/soc/microchip/miv/polarfire/Kconfig.defconfig
diff --git a/soc/microchip/miv/polarfire/Kconfig.defconfig.polarfire_u54 b/soc/microchip/miv/polarfire/Kconfig.defconfig.polarfire_u54
diff --git a/soc/microchip/miv/polarfire/Kconfig.soc b/soc/microchip/miv/polarfire/Kconfig.soc
diff --git a/soc/microchip/miv/soc.yml b/soc/microchip/miv/soc.yml
diff --git a/tests/subsys/mgmt/mcumgr/fs_mgmt_hash_supported/testcase.yaml b/tests/subsys/mgmt/mcumgr/fs_mgmt_hash_supported/testcase.yaml

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-identifier: beaglev_fire`
	`1`	`+identifier: beaglev_fire/polarfire/e51`
`2`	`2`	`name: Beagleboard BeagleV-Fire`
`3`	`3`	`type: mcu`
`4`	`4`	`arch: riscv`