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dts: arm: st: wl: Enable reinit for select peripherals
Enable STOP2 reinitialization for affected USART and SPI peripheral instances, as these will otherwise be INOP when the SoC returns from STOP2 low-power mode. Signed-off-by: Kenneth J. Miller <[email protected]>
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dts/arm/st/wl/stm32wl.dtsi

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@@ -229,6 +229,7 @@
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>;
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resets = <&rctl STM32_RESET(APB2, 14U)>;
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interrupts = <36 0>;
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reinit-power-states = <&stop2>;
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status = "disabled";
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};
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@@ -238,6 +239,7 @@
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
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resets = <&rctl STM32_RESET(APB1L, 17U)>;
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interrupts = <37 0>;
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reinit-power-states = <&stop2>;
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status = "disabled";
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};
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@@ -293,6 +295,7 @@
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reg = <0x40013000 0x400>;
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interrupts = <34 5>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
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reinit-power-states = <&stop2>;
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status = "disabled";
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};
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@@ -303,6 +306,7 @@
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reg = <0x40003800 0x400>;
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interrupts = <35 5>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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reinit-power-states = <&stop2>;
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status = "disabled";
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};
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@@ -313,6 +317,7 @@
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reg = <0x58010000 0x400>;
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interrupts = <44 5>;
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clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000001>;
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reinit-power-states = <&stop2>;
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status = "disabled";
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use-subghzspi-nss;
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