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| 1 | +.. _max32672_fthr: |
| 2 | + |
| 3 | +MAX32672FTHR |
| 4 | +############ |
| 5 | + |
| 6 | +Overview |
| 7 | +******** |
| 8 | +The MAX32672FTHR is a rapid development platform that helps engineers quickly implement complex |
| 9 | +sensor solutions using the MAX32672 Arm® Cortex®-M4. The board also includes the MAX8819 PMIC for |
| 10 | +battery and power management. The form factor is a small, 0.9in by 2.6in, dual row header footprint |
| 11 | +that is compatible with Adafruit® FeatherWing peripheral expansion boards. The board includes |
| 12 | +an OLED display, a RGB indicator LED, and a user pushbutton. The MAX32672FTHR provides |
| 13 | +a power-optimized flexible platform for quick proof-ofconcepts and early software development |
| 14 | +to enhance time to market. |
| 15 | + |
| 16 | +The Zephyr port is running on the MAX32672 MCU. |
| 17 | + |
| 18 | +.. image:: img/max32672fthr_img1.webp |
| 19 | + :align: center |
| 20 | + :alt: MAX32672FTHR Front |
| 21 | + |
| 22 | +.. image:: img/max32672fthr_img2.webp |
| 23 | + :align: center |
| 24 | + :alt: MAX32672FTHR Back |
| 25 | + |
| 26 | +Hardware |
| 27 | +******** |
| 28 | + |
| 29 | +- MAX32672 MCU: |
| 30 | + |
| 31 | + - High-Efficiency Microcontroller for Low-Power High-Reliability Devices |
| 32 | + |
| 33 | + - Arm Cortex-M4 Processor with FPU up to 100MHz |
| 34 | + - 1MB Dual-Bank Flash with Error Correction |
| 35 | + - 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes |
| 36 | + - EEPROM Emulation on Flash |
| 37 | + - 16KB Unified Cache with ECC |
| 38 | + - Resource Protection Unit (RPU) and MemoryProtection Unit (MPU) |
| 39 | + - Dual- or Single-Supply Operation, 1.7V to 3.6V |
| 40 | + - Wide Operating Temperature: -40°C to +105°C |
| 41 | + |
| 42 | + - Flexible Clocking Schemes |
| 43 | + |
| 44 | + - Internal High-Speed 100MHz Oscillator |
| 45 | + - Internal Low-Power 7.3728MHz and Ultra-Low-Power 80kHz Oscillators |
| 46 | + - 16MHz–32MHz Oscillator, 32.768kHz Oscillator(External Crystal Required) |
| 47 | + - External Clock Input for CPU, LPUART, LPTMR |
| 48 | + |
| 49 | + - Power Management Maximizes Uptime for Battery Applications |
| 50 | + |
| 51 | + - 59.8μA/MHz ACTIVE at 0.9V up to 12MHz(CoreMark®) |
| 52 | + - 56.6μA/MHz ACTIVE at 1.1V up to 100MHz(While(1)) |
| 53 | + - 3.09μA Full Memory Retention Power in BACKUPMode at VDD = 1.8V |
| 54 | + - 350nA Ultra-Low-Power RTC at |
| 55 | + - Wake from LPUART or LPTMR |
| 56 | + |
| 57 | + - Optimal Peripheral Mix Provides Platform Scalability |
| 58 | + |
| 59 | + - Up to 42 General-Purpose I/O Pins |
| 60 | + - Up to Three SPI Master/Slave (up to 50Mbps) |
| 61 | + - Up to Three 4-Wire UART |
| 62 | + - Up to Three I2C Master/Slave 3.4Mbps High Speed |
| 63 | + - Up to Four 32-Bit Timers (TMR) |
| 64 | + - Up to Two Low-Power 32-Bit Timers (LPTMR) |
| 65 | + - One I2S Master/Slave for Digital Audio Interface |
| 66 | + - 12-Channel, 12-Bit, 1Msps SAR ADC with On-DieTemperature Sensor |
| 67 | + |
| 68 | + - Security and Integrity |
| 69 | + |
| 70 | + - Optional ECDSA-Based Cryptographic SecureBootloader in ROM |
| 71 | + - Secure Cryptographic Accelerator for Elliptic Curve |
| 72 | + - AES-128/192/256 Hardware Acceleration Engine |
| 73 | + |
| 74 | +- Benefits and Features of MAX32672FTHR: |
| 75 | + |
| 76 | + - MAX8819 PMIC with Integrated Charger |
| 77 | + - On-Board DAPLink Debug and Programming Interface for Arm Cortex-M4 |
| 78 | + - Breadboard-Compatible Headers |
| 79 | + - Micro USB Connector |
| 80 | + - RGB Indicator LED |
| 81 | + - User Pushbutton |
| 82 | + - OLED Display |
| 83 | + - SWD Debugger |
| 84 | + - Virtual UART Console |
| 85 | + |
| 86 | +Supported Features |
| 87 | +================== |
| 88 | + |
| 89 | +Below interfaces are supported by Zephyr on MAX32672FTHR. |
| 90 | + |
| 91 | ++-----------+------------+-------------------------------------+ |
| 92 | +| Interface | Controller | Driver/Component | |
| 93 | ++===========+============+=====================================+ |
| 94 | +| NVIC | on-chip | nested vector interrupt controller | |
| 95 | ++-----------+------------+-------------------------------------+ |
| 96 | +| SYSTICK | on-chip | systick | |
| 97 | ++-----------+------------+-------------------------------------+ |
| 98 | +| CLOCK | on-chip | clock and reset control | |
| 99 | ++-----------+------------+-------------------------------------+ |
| 100 | +| GPIO | on-chip | gpio | |
| 101 | ++-----------+------------+-------------------------------------+ |
| 102 | +| UART | on-chip | serial | |
| 103 | ++-----------+------------+-------------------------------------+ |
| 104 | + |
| 105 | + |
| 106 | +Connections and IOs |
| 107 | +=================== |
| 108 | + |
| 109 | +J9 Pinout |
| 110 | +********** |
| 111 | + |
| 112 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 113 | +| Pin | Name | Description | |
| 114 | ++=========+==========+=================================================================================================+ |
| 115 | +| 1 | RST | Master Reset Signal | |
| 116 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 117 | +| 2 | 3V3 | 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers. | |
| 118 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 119 | +| 3 | 1V8 | 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers. | |
| 120 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 121 | +| 4 | GND | Ground | |
| 122 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 123 | +| 5 | P0_11 | GPIO or Analog Input (AIN3 channel). | |
| 124 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 125 | +| 6 | P0_12 | GPIO or Analog Input (AIN4 channel). | |
| 126 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 127 | +| 7 | P0_13 | GPIO or Analog Input (AIN5 channel). | |
| 128 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 129 | +| 8 | P0_22 | GPIO or ADC_TRIG signal. | |
| 130 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 131 | +| 9 | P0_27 | GPIO or QERR signal. | |
| 132 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 133 | +| 10 | P0_26 | GPIO or QDIR signal. | |
| 134 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 135 | +| 11 | P0_16 | GPIO or SPI1 clock signal. | |
| 136 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 137 | +| 12 | P0_15 | GPIO or SPI1 MOSI signal. | |
| 138 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 139 | +| 13 | P0_14 | GPIO or SPI1 MISO signal. | |
| 140 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 141 | +| 14 | P0_28 | GPIO or UART1 Rx signal. | |
| 142 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 143 | +| 15 | P0_29 | GPIO or UART1 Tx signal. | |
| 144 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 145 | +| 16 | GND | Ground | |
| 146 | ++---------+----------+-------------------------------------------------------------------------------------------------+ |
| 147 | + |
| 148 | + |
| 149 | +J7 Pinout |
| 150 | +********** |
| 151 | + |
| 152 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 153 | +| Pin | Name | Description | |
| 154 | ++=========+==========+===========================================================================================================+ |
| 155 | +| 1 | SYS | SYS Switched Connection to the Battery. This is the primary system power supply and automatically | |
| 156 | +| | | switches between the battery voltage and the USB supply when available. | |
| 157 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 158 | +| 2 | PWR | In battery-powered mode, turns off the PMIC if shorted to ground. | |
| 159 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 160 | +| 3 | VBUS | USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be | |
| 161 | +| | | used as an input to power the board. | |
| 162 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 163 | +| 4 | P0_5 | GPIO or HFX_CLK_OUT signal. | |
| 164 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 165 | +| 5 | P0_6 | GPIO or QEA signal. | |
| 166 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 167 | +| 6 | P0_7 | GPIO or QEB signal. | |
| 168 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 169 | +| 7 | P0_23 | GPIO or QEI signal. | |
| 170 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 171 | +| 8 | P0_17 | GPIO or SPI1 slave select signal. | |
| 172 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 173 | +| 9 | P0_24 | GPIO or QES signal. | |
| 174 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 175 | +| 10 | P0_25 | GPIO or QMATCH signal. | |
| 176 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 177 | +| 11 | P0_18 | GPIO or I2C2 SCL signal. | |
| 178 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 179 | +| 12 | P0_19 | GPIO or I2C2 SDA signal. | |
| 180 | ++---------+----------+-----------------------------------------------------------------------------------------------------------+ |
| 181 | + |
| 182 | +Programming and Debugging |
| 183 | +************************* |
| 184 | + |
| 185 | +Flashing |
| 186 | +======== |
| 187 | + |
| 188 | +The MAX32625 microcontroller on the board is flashed with DAPLink firmware at the factory. |
| 189 | +It allows debugging and flashing the MAX32672 Arm Core over USB. |
| 190 | + |
| 191 | +Once the debug probe is connected to your host computer, then you can simply run the |
| 192 | +``west flash`` command to write a firmware image into flash. |
| 193 | + |
| 194 | +Debugging |
| 195 | +========= |
| 196 | + |
| 197 | +Please refer to the `Flashing`_ section and run the ``west debug`` command |
| 198 | +instead of ``west flash``. |
| 199 | + |
| 200 | +References |
| 201 | +********** |
| 202 | + |
| 203 | +- `MAX32672FTHR web page`_ |
| 204 | + |
| 205 | +.. _MAX32672FTHR web page: |
| 206 | + https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32672fthr.html |
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