boards, dts: fix namespace for intel adsp cavs, ace

Fixes namespace for Intel ADSP CAVS and ACE boards.

Signed-off-by: Lauren Murphy <[email protected]>

Author: laurenmurphyx64

boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs15.dtsi>
+#include <intel/intel_adsp_cavs15.dtsi>
 
 / {
 	model = "intel_adsp_cavs15";

boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs18.dtsi>
+#include <intel/intel_adsp_cavs18.dtsi>
 
 / {
 	model = "intel_adsp_cavs18";

boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs20.dtsi>
+#include <intel/intel_adsp_cavs20.dtsi>
 
 / {
 	model = "intel_adsp_cavs20";

boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs20_jsl.dtsi>
+#include <intel/intel_adsp_cavs20_jsl.dtsi>
 
 / {
 	model = "intel_adsp_cavs20_jsl";

boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs25.dtsi>
+#include <intel/intel_adsp_cavs25.dtsi>
 
 / {
 	model = "intel_adsp_cavs25";

boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25_tgph.dts

@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include <intel/intel_cavs25_tgph.dtsi>
+#include <intel/intel_adsp_cavs25_tgph.dtsi>
 
 / {
 	model = "intel_adsp_cavs25_tgph";

drivers/clock_control/CMakeLists.txt

@@ -3,7 +3,7 @@
 zephyr_library()
 
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BEETLE              beetle_clock_control.c)
-zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_CAVS                clock_control_cavs.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_ADSP                clock_control_cavs.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_ESP32               clock_control_esp32.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_GD32                clock_control_gd32.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_LITEX               clock_control_litex.c)

drivers/clock_control/Kconfig.cavs

@@ -3,11 +3,11 @@
 # Copyright (c) 2022 Intel Corporation
 # SPDX-License-Idertifier: Apache-2.0
 
-config CLOCK_CONTROL_CAVS
+config CLOCK_CONTROL_ADSP
 	bool "Intel CAVS clock control"
 	default y
-	depends on DT_HAS_INTEL_CAVS_SHIM_CLKCTL_ENABLED
-	select CAVS_CLOCK
+	depends on DT_HAS_INTEL_ADSP_SHIM_CLKCTL_ENABLED
+	select ADSP_CLOCK
 	help
 	  Driver for the CAVS clocks. Allow type of clock (and
 	  thus frequency) to be chosen.

drivers/ipm/ipm_cavs_idc.c

@@ -188,7 +188,7 @@ static int cavs_idc_set_enabled(const struct device *dev, int enable)
 		idc_write(IPC_IDCCTL, i, mask);
 
 		/* FIXME: when we have API to enable IRQ on specific core. */
-		sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) + 0x04 +
+		sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs_intc0)) + 0x04 +
 			    CAVS_ICTL_INT_CPU_OFFSET(i),
 			    CAVS_IRQ_NUMBER(DT_INST_IRQN(0)));
 	}

dts/bindings/clock/intel,cavs-shim-clkctl.yaml renamed to dts/bindings/clock/intel,adsp-shim-clkctl.yaml

@@ -3,7 +3,7 @@
 
 description: Intel cAVS clock controlling related constants.
 
-compatible: "intel,cavs-shim-clkctl"
+compatible: "intel,adsp-shim-clkctl"
 
 properties:
     cavs-clkctl-clk-wovcro: