boards: mimxrt1060_evk: Enable ADC on RT1060

Enables the ADC on the RT1060 evaluation board. Channels 0 and 15 of
ADC1 are available on pins 1 and 0 of J23, respectively.

Signed-off-by: Daniel DeGrasse <[email protected]>

Author: danieldegrasse

boards/arm/mimxrt1060_evk/doc/index.rst

@@ -119,6 +119,8 @@ features:
 +-----------+------------+-------------------------------------+
 | DMA       | on-chip    | dma                                 |
 +-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
 
 
 The default configuration can be found in the defconfig file:
@@ -246,6 +248,10 @@ The MIMXRT1060 SoC has five pairs of pinmux/gpio controllers.
 +---------------+-----------------+---------------------------+
 | GPIO_SD_B0_05 | USDHC1_DATA3    | SD Card                   |
 +---------------+-----------------+---------------------------+
+| GPIO_AD_B1_11 | ADC             | ADC1 Channel 0            |
++---------------+-----------------+---------------------------+
+| GPIO_AD_B1_10 | ADC             | ADC1 Channel 15           |
++---------------+-----------------+---------------------------+
 
 .. note::
         In order to use the SPI peripheral on this board, resistors R278, R279,

boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts

@@ -172,6 +172,10 @@ arduino_serial: &lpuart3 {};
 	};
 };
 
+&adc1 {
+	status = "okay";
+};
+
 zephyr_udc0: &usb1 {
 	status = "okay";
 };

boards/arm/mimxrt1060_evk/mimxrt1060_evk.yaml

@@ -29,3 +29,4 @@ supported:
   - dma
   - can
   - watchdog
+  - adc

boards/arm/mimxrt1060_evk/pinmux.c

@@ -280,6 +280,7 @@ static int mimxrt1060_evk_init(const struct device *dev)
 	GPIO_PinInit(GPIO2, 31, &config);
 #endif
 
+
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan1), okay) && CONFIG_CAN
 	/* FLEXCAN1 TX, RX */
 	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_FLEXCAN1_TX, 1);
@@ -298,6 +299,19 @@ static int mimxrt1060_evk_init(const struct device *dev)
 	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_15_FLEXCAN2_RX, 0x10B0u);
 #endif
 
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC
+	/* ADC1 Input 0 */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U);
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27,
+			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+			IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+	/* ADC1 Input 15 */
+	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U);
+	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26,
+			IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
+			IOMUXC_SW_PAD_CTL_PAD_DSE(6));
+#endif
+
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(flexcan3), okay) && CONFIG_CAN
 	/* FLEXCAN3 TX, RX */
 	IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_36_FLEXCAN3_TX, 1);

samples/drivers/adc/boards/mimxrt1060_evk.overlay

@@ -0,0 +1,12 @@
+/*
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Copyright (c) 2021 NXP
+ */
+
+/ {
+	zephyr,user {
+		/* adjust channel number according to pinmux in board.dts */
+		io-channels = <&adc1 0>;
+	};
+};

tests/drivers/adc/adc_api/src/test_adc.c

@@ -297,7 +297,8 @@
 
 #elif defined(CONFIG_BOARD_MIMXRT1050_EVK) || \
 	defined(CONFIG_BOARD_MIMXRT1050_EVK_QSPI) || \
-	defined(CONFIG_BOARD_MIMXRT1064_EVK)
+	defined(CONFIG_BOARD_MIMXRT1064_EVK) || \
+	defined(CONFIG_BOARD_MIMXRT1060_EVK)
 #define ADC_DEVICE_NAME		DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar))
 #define ADC_RESOLUTION		12
 #define ADC_GAIN		ADC_GAIN_1