drivers: serial: pl011: add support for hardware flow control

Flow control will be enabled for UART if hw-flow-control is set.

Signed-off-by: Xudong Zheng <[email protected]>

Author: xudongzheng

drivers/serial/uart_pl011.c

@@ -88,6 +88,20 @@ static void pl011_disable_fifo(const struct device *dev)
 	get_uart(dev)->lcr_h &= ~PL011_LCRH_FEN;
 }
 
+static void pl011_set_flow_control(const struct device *dev, bool rts, bool cts)
+{
+	if (rts) {
+		get_uart(dev)->cr |= PL011_CR_RTSEn;
+	} else {
+		get_uart(dev)->cr &= ~PL011_CR_RTSEn;
+	}
+	if (cts) {
+		get_uart(dev)->cr |= PL011_CR_CTSEn;
+	} else {
+		get_uart(dev)->cr &= ~PL011_CR_CTSEn;
+	}
+}
+
 static int pl011_set_baudrate(const struct device *dev,
 			      uint32_t clk, uint32_t baudrate)
 {
@@ -240,6 +254,10 @@ static int pl011_runtime_configure_internal(const struct device *dev,
 
 	switch (cfg->flow_ctrl) {
 	case UART_CFG_FLOW_CTRL_NONE:
+		pl011_set_flow_control(dev, false, false);
+		break;
+	case UART_CFG_FLOW_CTRL_RTS_CTS:
+		pl011_set_flow_control(dev, true, true);
 		break;
 	default:
 		goto enable;
@@ -506,7 +524,7 @@ static int pl011_init(const struct device *dev)
 	if (!data->sbsa) {
 		get_uart(dev)->dmacr = 0U;
 		barrier_isync_fence_full();
-		get_uart(dev)->cr &= ~(BIT(14) | BIT(15) | BIT(1));
+		get_uart(dev)->cr &= ~PL011_CR_SIREN;
 		get_uart(dev)->cr |= PL011_CR_RXE | PL011_CR_TXE;
 		barrier_isync_fence_full();
 	}
@@ -641,7 +659,9 @@ void pl011_isr(const struct device *dev)
 			.parity = UART_CFG_PARITY_NONE,			\
 			.stop_bits = UART_CFG_STOP_BITS_1,		\
 			.data_bits = UART_CFG_DATA_BITS_8,		\
-			.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,		\
+			.flow_ctrl = DT_INST_PROP(n, hw_flow_control)	\
+				? UART_CFG_FLOW_CTRL_RTS_CTS		\
+				: UART_CFG_FLOW_CTRL_NONE,		\
 		},							\
 		.clk_freq = COND_CODE_1(                                                \
 			DT_NODE_HAS_COMPAT(DT_INST_CLOCKS_CTLR(n), fixed_clock),        \