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1 parent b8b1eb4 commit 1a47e3aCopy full SHA for 1a47e3a
dts/arm/st/h7/stm32h735.dtsi
@@ -49,6 +49,16 @@
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health-test-magic = <0x17590abc>;
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health-test-config = <0xaa74>;
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};
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+
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+ ltdc: display-controller@50001000 {
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+ compatible = "st,stm32-ltdc";
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+ reg = <0x50001000 0x200>;
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+ interrupts = <88 0>, <89 0>;
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+ interrupt-names = "ltdc", "ltdc_er";
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+ clocks = <&rcc STM32_CLOCK_BUS_APB3 0x000000008>;
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+ label = "LTDC";
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+ status = "disabled";
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+ };
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/* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
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