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ethernet: stm32: add a alternative HAL_ETH_Init for V1 api
add a alternative HAL_ETH_Init for V1 api without phy configuration, as this is already been done outside of the ethernet driver. Signed-off-by: Fin Maaß <[email protected]>
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drivers/ethernet/eth_stm32_hal.c

Lines changed: 70 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -877,6 +877,75 @@ static void RISAF_Config(void)
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}
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#endif
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880+
#if defined(CONFIG_ETH_STM32_HAL_API_V1)
881+
#define ETH_TIMEOUT_SWRESET 500U
882+
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HAL_StatusTypeDef HAL_ETH_Init_alt(ETH_HandleTypeDef *heth)
884+
{
885+
uint32_t tmpreg1 = 0U;
886+
uint32_t tickstart = 0U;
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888+
/* Check the ETH peripheral state */
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if (heth == NULL) {
890+
return HAL_ERROR;
891+
}
892+
893+
if (heth->State == HAL_ETH_STATE_RESET) {
894+
/* Allocate lock resource and initialize it */
895+
heth->Lock = HAL_UNLOCKED;
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}
897+
898+
/* Select MII or RMII Mode*/
899+
#ifdef SOC_SERIES_STM32F1X
900+
AFIO->MAPR &= ~(AFIO_MAPR_MII_RMII_SEL);
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AFIO->MAPR |= (uint32_t)heth->Init.MediaInterface;
902+
#else
903+
/* Enable SYSCFG Clock */
904+
__HAL_RCC_SYSCFG_CLK_ENABLE();
905+
906+
/* Select MII or RMII Mode*/
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SYSCFG->PMC &= ~(SYSCFG_PMC_MII_RMII_SEL);
908+
SYSCFG->PMC |= (uint32_t)heth->Init.MediaInterface;
909+
#endif /* SOC_SERIES_STM32F1X */
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911+
/* Get the ETHERNET MACMIIAR value, this is responsible for mdio, so save it to restore it
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* later
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*/
914+
tmpreg1 = (heth->Instance)->MACMIIAR;
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/* Ethernet Software reset */
917+
/* Set the SWR bit: resets all MAC subsystem internal registers and logic */
918+
/* After reset all the registers holds their respective reset values */
919+
(heth->Instance)->DMABMR |= ETH_DMABMR_SR;
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921+
/* Get tick */
922+
tickstart = k_uptime_get_32();
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/* Wait for software reset */
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while (((heth->Instance)->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET) {
926+
/* Check for the Timeout */
927+
if ((k_uptime_get_32() - tickstart) > ETH_TIMEOUT_SWRESET) {
928+
heth->State = HAL_ETH_STATE_TIMEOUT;
929+
930+
/* Process Unlocked */
931+
__HAL_UNLOCK(heth);
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933+
return HAL_TIMEOUT;
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}
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}
936+
937+
(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;
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939+
/* Config MAC and DMA */
940+
ETH_MACDMAConfig(heth, ETH_SUCCESS);
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942+
/* Set ETH HAL State to Ready */
943+
heth->State = HAL_ETH_STATE_READY;
944+
945+
return HAL_OK;
946+
}
947+
#endif /* CONFIG_ETH_STM32_HAL_API_V1 */
948+
880949
static int eth_initialize(const struct device *dev)
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{
882951
struct eth_stm32_hal_dev_data *dev_data;
@@ -948,7 +1017,7 @@ static int eth_initialize(const struct device *dev)
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PHY_LINK_IS_SPEED_100M(state.speed) ? ETH_SPEED_100M : ETH_SPEED_10M;
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}
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951-
hal_ret = HAL_ETH_Init(heth);
1020+
hal_ret = HAL_ETH_Init_alt(heth);
9521021
if (hal_ret == HAL_TIMEOUT) {
9531022
/* HAL Init time out. This could be linked to */
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/* a recoverable error. Log the issue and continue */

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