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Phuc Phamkartben
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dts: renesas: Add I2C support for Renesas RZ/A3UL, T2M, N2L, V2L
Add I2C nodes to Renesas RZ/A3UL, T2M, N2L, V2L Signed-off-by: Phuc Pham <[email protected]> Signed-off-by: Nhut Nguyen <[email protected]>
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dts/arm/renesas/rz/rzn/r9a07g084.dtsi

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
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#include <arm/armv8-r.dtsi>
88
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
99
#include <zephyr/dt-bindings/adc/adc.h>
10+
#include <zephyr/dt-bindings/i2c/i2c.h>
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1112
/ {
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#address-cells = <1>;
@@ -1060,5 +1061,50 @@
10601061
status = "disabled";
10611062
};
10621063
};
1064+
1065+
i2c0: i2c@80043000 {
1066+
compatible = "renesas,rz-iic";
1067+
channel = <0>;
1068+
clock-frequency = <I2C_BITRATE_STANDARD>;
1069+
#address-cells = <1>;
1070+
#size-cells = <0>;
1071+
reg = <0x80043000 0x400>;
1072+
interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1073+
<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1074+
<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1075+
<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1076+
interrupt-names = "eri", "rxi", "txi", "tei";
1077+
status = "disabled";
1078+
};
1079+
1080+
i2c1: i2c@80043400 {
1081+
compatible = "renesas,rz-iic";
1082+
channel = <1>;
1083+
clock-frequency = <I2C_BITRATE_STANDARD>;
1084+
#address-cells = <1>;
1085+
#size-cells = <0>;
1086+
reg = <0x80043400 0x400>;
1087+
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1088+
<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1089+
<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1090+
<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1091+
interrupt-names = "eri", "rxi", "txi", "tei";
1092+
status = "disabled";
1093+
};
1094+
1095+
i2c2: i2c@81008000 {
1096+
compatible = "renesas,rz-iic";
1097+
channel = <2>;
1098+
clock-frequency = <I2C_BITRATE_STANDARD>;
1099+
#address-cells = <1>;
1100+
#size-cells = <0>;
1101+
reg = <0x81008000 0x400>;
1102+
interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1103+
<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1104+
<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1105+
<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1106+
interrupt-names = "eri", "rxi", "txi", "tei";
1107+
status = "disabled";
1108+
};
10631109
};
10641110
};

dts/arm/renesas/rz/rzt/r9a07g075.dtsi

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
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#include <arm/armv8-r.dtsi>
1010
#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
1111
#include <zephyr/dt-bindings/adc/adc.h>
12+
#include <zephyr/dt-bindings/i2c/i2c.h>
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1314
/ {
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compatible = "renesas,r9a07g075";
@@ -1058,5 +1059,50 @@
10581059
status = "disabled";
10591060
};
10601061
};
1062+
1063+
i2c0: i2c@80043000 {
1064+
compatible = "renesas,rz-iic";
1065+
channel = <0>;
1066+
clock-frequency = <I2C_BITRATE_STANDARD>;
1067+
#address-cells = <1>;
1068+
#size-cells = <0>;
1069+
reg = <0x80043000 0x400>;
1070+
interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1071+
<GIC_SPI 309 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1072+
<GIC_SPI 310 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1073+
<GIC_SPI 311 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1074+
interrupt-names = "eri", "rxi", "txi", "tei";
1075+
status = "disabled";
1076+
};
1077+
1078+
i2c1: i2c@80043400 {
1079+
compatible = "renesas,rz-iic";
1080+
channel = <1>;
1081+
clock-frequency = <I2C_BITRATE_STANDARD>;
1082+
#address-cells = <1>;
1083+
#size-cells = <0>;
1084+
reg = <0x80043400 0x400>;
1085+
interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1086+
<GIC_SPI 313 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1087+
<GIC_SPI 314 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1088+
<GIC_SPI 315 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1089+
interrupt-names = "eri", "rxi", "txi", "tei";
1090+
status = "disabled";
1091+
};
1092+
1093+
i2c2: i2c@81008000 {
1094+
compatible = "renesas,rz-iic";
1095+
channel = <2>;
1096+
clock-frequency = <I2C_BITRATE_STANDARD>;
1097+
#address-cells = <1>;
1098+
#size-cells = <0>;
1099+
reg = <0x81008000 0x400>;
1100+
interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1101+
<GIC_SPI 440 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1102+
<GIC_SPI 441 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
1103+
<GIC_SPI 442 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1104+
interrupt-names = "eri", "rxi", "txi", "tei";
1105+
status = "disabled";
1106+
};
10611107
};
10621108
};

dts/arm/renesas/rz/rzv/r9a07g054.dtsi

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Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
#include <mem.h>
88
#include <freq.h>
99
#include <zephyr/dt-bindings/adc/adc.h>
10+
#include <zephyr/dt-bindings/i2c/i2c.h>
1011

1112
/ {
1213
compatible = "renesas,r9a07g054";
@@ -775,6 +776,58 @@
775776
status = "disabled";
776777
};
777778
};
779+
780+
i2c0: i2c@40058000 {
781+
compatible = "renesas,rz-riic";
782+
channel = <0>;
783+
clock-frequency = <I2C_BITRATE_STANDARD>;
784+
#address-cells = <1>;
785+
#size-cells = <0>;
786+
reg = <0x40058000 DT_SIZE_K(1)>;
787+
interrupts = <348 1>, <349 1>, <350 1>, <351 1>,
788+
<352 1>, <353 1>, <354 1>, <355 1>;
789+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
790+
status = "disabled";
791+
};
792+
793+
i2c1: i2c@40058400 {
794+
compatible = "renesas,rz-riic";
795+
channel = <1>;
796+
clock-frequency = <I2C_BITRATE_STANDARD>;
797+
#address-cells = <1>;
798+
#size-cells = <0>;
799+
reg = <0x40058400 DT_SIZE_K(1)>;
800+
interrupts = <356 1>, <357 1>, <358 1>, <359 1>,
801+
<360 1>, <361 1>, <362 1>, <363 1>;
802+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
803+
status = "disabled";
804+
};
805+
806+
i2c2: i2c@40058800 {
807+
compatible = "renesas,rz-riic";
808+
channel = <2>;
809+
clock-frequency = <I2C_BITRATE_STANDARD>;
810+
#address-cells = <1>;
811+
#size-cells = <0>;
812+
reg = <0x40058800 DT_SIZE_K(1)>;
813+
interrupts = <364 1>, <365 1>, <366 1>, <367 1>,
814+
<368 1>, <369 1>, <370 1>, <371 1>;
815+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
816+
status = "disabled";
817+
};
818+
819+
i2c3: i2c@40058c00 {
820+
compatible = "renesas,rz-riic";
821+
channel = <3>;
822+
clock-frequency = <I2C_BITRATE_STANDARD>;
823+
#address-cells = <1>;
824+
#size-cells = <0>;
825+
reg = <0x40058c00 DT_SIZE_K(1)>;
826+
interrupts = <372 1>, <373 1>, <374 1>, <375 1>,
827+
<376 1>, <377 1>, <378 1>, <379 1>;
828+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
829+
status = "disabled";
830+
};
778831
};
779832
};
780833

dts/arm64/renesas/rz/rza/r9a07g063.dtsi

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#include <zephyr/dt-bindings/gpio/gpio.h>
1212
#include <zephyr/dt-bindings/pwm/renesas_rz_pwm.h>
1313
#include <zephyr/dt-bindings/adc/adc.h>
14+
#include <zephyr/dt-bindings/i2c/i2c.h>
1415

1516
/ {
1617
compatible = "renesas,r9a07g063";
@@ -570,5 +571,81 @@
570571
status = "disabled";
571572
};
572573
};
574+
575+
i2c0: i2c@10058000 {
576+
compatible = "renesas,rz-riic";
577+
channel = <0>;
578+
clock-frequency = <I2C_BITRATE_STANDARD>;
579+
#address-cells = <1>;
580+
#size-cells = <0>;
581+
reg = <0x10058000 DT_SIZE_K(1)>;
582+
interrupts = <GIC_SPI 348 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
583+
<GIC_SPI 349 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
584+
<GIC_SPI 350 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
585+
<GIC_SPI 351 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
586+
<GIC_SPI 352 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
587+
<GIC_SPI 353 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
588+
<GIC_SPI 354 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
589+
<GIC_SPI 355 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
590+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
591+
status = "disabled";
592+
};
593+
594+
i2c1: i2c@10058400 {
595+
compatible = "renesas,rz-riic";
596+
channel = <1>;
597+
clock-frequency = <I2C_BITRATE_STANDARD>;
598+
#address-cells = <1>;
599+
#size-cells = <0>;
600+
reg = <0x10058400 DT_SIZE_K(1)>;
601+
interrupts = <GIC_SPI 356 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
602+
<GIC_SPI 357 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
603+
<GIC_SPI 358 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
604+
<GIC_SPI 359 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
605+
<GIC_SPI 360 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
606+
<GIC_SPI 361 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
607+
<GIC_SPI 362 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
608+
<GIC_SPI 363 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
609+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
610+
status = "disabled";
611+
};
612+
613+
i2c2: i2c@10058800 {
614+
compatible = "renesas,rz-riic";
615+
channel = <2>;
616+
clock-frequency = <I2C_BITRATE_STANDARD>;
617+
#address-cells = <1>;
618+
#size-cells = <0>;
619+
reg = <0x10058800 DT_SIZE_K(1)>;
620+
interrupts = <GIC_SPI 364 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
621+
<GIC_SPI 365 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
622+
<GIC_SPI 366 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
623+
<GIC_SPI 367 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
624+
<GIC_SPI 368 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
625+
<GIC_SPI 369 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
626+
<GIC_SPI 370 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
627+
<GIC_SPI 371 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
628+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
629+
status = "disabled";
630+
};
631+
632+
i2c3: i2c@10058c00 {
633+
compatible = "renesas,rz-riic";
634+
channel = <3>;
635+
clock-frequency = <I2C_BITRATE_STANDARD>;
636+
#address-cells = <1>;
637+
#size-cells = <0>;
638+
reg = <0x10058c00 DT_SIZE_K(1)>;
639+
interrupts = <GIC_SPI 372 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
640+
<GIC_SPI 373 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>,
641+
<GIC_SPI 374 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
642+
<GIC_SPI 375 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
643+
<GIC_SPI 376 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
644+
<GIC_SPI 377 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
645+
<GIC_SPI 378 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
646+
<GIC_SPI 379 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
647+
interrupt-names = "rxi", "txi", "tei", "naki", "spi", "sti", "ali", "tmoi";
648+
status = "disabled";
649+
};
573650
};
574651
};

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