@@ -64,8 +64,7 @@ static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, si
6464 stream -> dma_cfg .channel_direction = MEMORY_TO_PERIPHERAL ;
6565 }
6666
67- /* Dest is always LPSPI tx fifo */
68- blk_cfg -> dest_address = LPSPI_GetTxRegisterAddress (base );
67+ blk_cfg -> dest_address = (uint32_t ) & (base -> TDR );
6968
7069 return dma_config (stream -> dma_dev , stream -> channel , & stream -> dma_cfg );
7170}
@@ -87,7 +86,7 @@ static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t l
8786 blk_cfg -> dest_address = (uint32_t )buf ;
8887 }
8988
90- blk_cfg -> source_address = LPSPI_GetRxRegisterAddress ( base );
89+ blk_cfg -> source_address = ( uint32_t ) & ( base -> RDR );
9190
9291 return dma_config (stream -> dma_dev , stream -> channel , & stream -> dma_cfg );
9392}
@@ -180,8 +179,10 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t
180179 return ;
181180 }
182181
183- while ((IS_ENABLED (CONFIG_SOC_FAMILY_NXP_IMXRT ) || IS_ENABLED (CONFIG_SOC_FAMILY_KINETIS )) &&
184- (LPSPI_GetStatusFlags (base ) & kLPSPI_ModuleBusyFlag )) {
182+
183+ while ((IS_ENABLED (CONFIG_SOC_FAMILY_NXP_IMXRT ) ||
184+ IS_ENABLED (CONFIG_SOC_FAMILY_KINETIS )) &&
185+ (base -> SR & LPSPI_SR_MBF_MASK )) {
185186 /* wait until module is idle */
186187 }
187188
@@ -198,11 +199,11 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t
198199error :
199200 LOG_ERR ("DMA callback error with channel %d err %d." , channel , status );
200201done :
201- LPSPI_DisableDMA ( base , kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable );
202+ base -> DER &= ~( LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK );
202203 base -> TCR &= ~LPSPI_TCR_CONT_MASK ;
203204 lpspi_wait_tx_fifo_empty (spi_dev );
204205 spi_context_cs_control (ctx , false);
205- LPSPI_FlushFifo ( base , true, true) ;
206+ base -> CR |= LPSPI_CR_RTF_MASK | LPSPI_CR_RRF_MASK ;
206207 spi_context_complete (ctx , spi_dev , status );
207208 spi_context_release (ctx , status );
208209}
@@ -240,9 +241,9 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi
240241
241242 spi_context_cs_control (ctx , true);
242243
243- LPSPI_FlushFifo ( base , true, true) ;
244+ base -> CR |= LPSPI_CR_RTF_MASK | LPSPI_CR_RRF_MASK ;
244245
245- LPSPI_EnableDMA ( base , kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable ) ;
246+ base -> DER |= LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK ;
246247
247248 ret = spi_context_wait_for_completion (ctx );
248249 if (ret >= 0 ) {
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