dts: wch: fix ngpios for some WCH SoCs

The CH32V20x and CH32V30x SoCs have 16 pins per GPIO bank, but in the
devicetree, `ngpios` was incorrectly set to 8.
Fix the devicetrees by setting the correct value.

Signed-off-by: Miguel Gazquez <[email protected]>

Author: miggazElquez

dts/riscv/wch/ch32v203/ch32v203.dtsi

@@ -76,7 +76,7 @@
 				reg = <0x40010800 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPA>;
 			};
 
@@ -85,7 +85,7 @@
 				reg = <0x40010C00 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPB>;
 			};
 
@@ -94,7 +94,7 @@
 				reg = <0x40011000 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPC>;
 			};
 
@@ -103,7 +103,7 @@
 				reg = <0x40011400 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPD>;
 			};
 		};

dts/riscv/wch/ch32v208/ch32v208.dtsi

@@ -83,7 +83,7 @@
 				reg = <0x40010800 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPA>;
 			};
 
@@ -92,7 +92,7 @@
 				reg = <0x40010C00 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPB>;
 			};
 
@@ -101,7 +101,7 @@
 				reg = <0x40011000 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPC>;
 			};
 
@@ -110,7 +110,7 @@
 				reg = <0x40011400 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPD>;
 			};
 		};

dts/riscv/wch/ch32v303/ch32v303.dtsi

@@ -78,7 +78,7 @@
 				reg = <0x40010800 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPA>;
 			};
 
@@ -87,7 +87,7 @@
 				reg = <0x40010C00 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPB>;
 			};
 
@@ -96,7 +96,7 @@
 				reg = <0x40011000 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPC>;
 			};
 
@@ -105,7 +105,7 @@
 				reg = <0x40011400 0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
-				ngpios = <8>;
+				ngpios = <16>;
 				clocks = <&rcc CH32V20X_V30X_CLOCK_IOPD>;
 			};
 		};