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Bluetooth: Controller: Use CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET
Use CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET for nRF53 SoC conditional compilations. Signed-off-by: Vinayak Kariappa Chettimada <[email protected]>
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  • subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio

1 file changed

+36
-35
lines changed

‎subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c‎

Lines changed: 36 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,7 @@ void radio_tx_power_set(int8_t power)
317317
value = hal_radio_tx_power_value(power);
318318
NRF_RADIO->TXPOWER = value;
319319

320-
#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
320+
#elif defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
321321
uint32_t value;
322322

323323
/* NOTE: TXPOWER register only accepts upto 0dBm, hence use the HAL
@@ -328,12 +328,12 @@ void radio_tx_power_set(int8_t power)
328328
NRF_RADIO->TXPOWER = value;
329329
hal_radio_tx_power_high_voltage_set(power);
330330

331-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
331+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
332332

333333
/* NOTE: valid value range is passed by Kconfig define. */
334334
NRF_RADIO->TXPOWER = (uint32_t)power;
335335

336-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
336+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
337337
}
338338

339339
void radio_tx_power_max_set(void)
@@ -351,25 +351,25 @@ int8_t radio_tx_power_min_get(void)
351351

352352
int8_t radio_tx_power_max_get(void)
353353
{
354-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
354+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
355355
return RADIO_TXPOWER_TXPOWER_Pos3dBm;
356356

357-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
357+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET */
358358
return (int8_t)hal_radio_tx_power_max_get();
359359

360-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
360+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET */
361361
}
362362

363363
int8_t radio_tx_power_floor(int8_t power)
364364
{
365-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
365+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
366366
/* NOTE: TXPOWER register only accepts upto 0dBm, +3dBm permitted by
367367
* use of high voltage being set for radio when TXPOWER register is set.
368368
*/
369369
if (power >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) {
370370
return RADIO_TXPOWER_TXPOWER_Pos3dBm;
371371
}
372-
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
372+
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET */
373373

374374
return (int8_t)hal_radio_tx_power_floor(power);
375375
}
@@ -427,7 +427,7 @@ void radio_pkt_configure(uint8_t bits_len, uint8_t max_len, uint8_t flags)
427427
bits_s1 = RADIO_PKT_CONF_LENGTH_8BIT - bits_len;
428428

429429
#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X) || \
430-
defined(CONFIG_SOC_COMPATIBLE_NRF53X) || \
430+
defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || \
431431
defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
432432
extra = 0U;
433433

@@ -525,7 +525,7 @@ uint32_t radio_rx_chain_delay_get(uint8_t phy, uint8_t flags)
525525
void radio_rx_enable(void)
526526
{
527527
#if !defined(CONFIG_BT_CTLR_TIFS_HW)
528-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
528+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
529529
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
530530
* because of calls to radio_disable() and
531531
* radio_switch_complete_and_disable() inside a radio event call
@@ -538,7 +538,7 @@ void radio_rx_enable(void)
538538
* radio event but when the radio event is done.
539539
*/
540540
hal_sw_switch_timer_clear_ppi_config();
541-
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X || CONFIG_SOC_COMPATIBLE_NRF54LX */
541+
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || CONFIG_SOC_COMPATIBLE_NRF54LX */
542542
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
543543

544544
nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_RXEN);
@@ -547,7 +547,7 @@ void radio_rx_enable(void)
547547
void radio_tx_enable(void)
548548
{
549549
#if !defined(CONFIG_BT_CTLR_TIFS_HW)
550-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
550+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
551551
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
552552
* because of calls to radio_disable() and
553553
* radio_switch_complete_and_disable() inside a radio event call
@@ -560,7 +560,7 @@ void radio_tx_enable(void)
560560
* radio event but when the radio event is done.
561561
*/
562562
hal_sw_switch_timer_clear_ppi_config();
563-
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X || CONFIG_SOC_COMPATIBLE_NRF54LX */
563+
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || CONFIG_SOC_COMPATIBLE_NRF54LX */
564564
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
565565

566566
nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_TXEN);
@@ -939,13 +939,13 @@ void sw_switch(uint8_t dir_curr, uint8_t dir_next, uint8_t phy_curr, uint8_t fla
939939
* time-stamp.
940940
*/
941941
hal_radio_end_time_capture_ppi_config();
942-
#if !defined(CONFIG_SOC_COMPATIBLE_NRF53X) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
942+
#if !defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
943943
/* The function is not called for nRF5340 single timer configuration because
944944
* HAL_SW_SWITCH_TIMER_CLEAR_PPI is equal to HAL_RADIO_END_TIME_CAPTURE_PPI,
945945
* so channel is already enabled.
946946
*/
947947
hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
948-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
948+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
949949
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
950950

951951
sw_tifs_toggle += 1U;
@@ -1360,38 +1360,38 @@ void radio_tmr_rx_status_reset(void)
13601360

13611361
void radio_tmr_tx_enable(void)
13621362
{
1363-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1364-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1363+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1364+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13651365
#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
13661366
hal_radio_enable_on_tick_ppi_config_and_enable(1U);
13671367
#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
1368-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1368+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13691369
}
13701370

13711371
void radio_tmr_rx_enable(void)
13721372
{
1373-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1374-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1373+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1374+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13751375
#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
13761376
hal_radio_enable_on_tick_ppi_config_and_enable(0U);
13771377
#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
1378-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1378+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13791379
}
13801380

13811381
void radio_tmr_tx_disable(void)
13821382
{
1383-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1383+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
13841384
nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_TXEN);
1385-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1386-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1385+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1386+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13871387
}
13881388

13891389
void radio_tmr_rx_disable(void)
13901390
{
1391-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1391+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
13921392
nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_RXEN);
1393-
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1394-
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1393+
#else /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
1394+
#endif /* !CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX */
13951395
}
13961396

13971397
void radio_tmr_tifs_set(uint32_t tifs)
@@ -1627,7 +1627,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t ticks_start)
16271627
#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
16281628
last_pdu_end_us_init(latency_us);
16291629
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
1630-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1630+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
16311631
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
16321632
* because of calls to radio_disable() and
16331633
* radio_switch_complete_and_disable() inside a radio event call
@@ -1640,7 +1640,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t ticks_start)
16401640
* radio event but when the radio event is done.
16411641
*/
16421642
hal_sw_switch_timer_clear_ppi_config();
1643-
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X || CONFIG_SOC_COMPATIBLE_NRF54LX */
1643+
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || CONFIG_SOC_COMPATIBLE_NRF54LX */
16441644
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
16451645

16461646
return remainder_us;
@@ -1657,7 +1657,7 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
16571657
*/
16581658
start_us -= last_pdu_end_us;
16591659
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
1660-
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
1660+
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)
16611661
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
16621662
* because of calls to radio_disable() and
16631663
* radio_switch_complete_and_disable() inside a radio event call
@@ -1670,7 +1670,7 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
16701670
* radio event but when the radio event is done.
16711671
*/
16721672
hal_sw_switch_timer_clear_ppi_config();
1673-
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X || CONFIG_SOC_COMPATIBLE_NRF54LX */
1673+
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || CONFIG_SOC_COMPATIBLE_NRF54LX */
16741674
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
16751675

16761676
/* start_us could be the current count in the timer */
@@ -1876,13 +1876,14 @@ void radio_tmr_end_capture(void)
18761876
* hal_sw_switch_timer_clear_ppi_config() and sw_switch(). There is no need to
18771877
* configure the channel again in this function.
18781878
*/
1879-
#if (!defined(CONFIG_SOC_COMPATIBLE_NRF53X) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)) || \
1880-
((defined(CONFIG_SOC_COMPATIBLE_NRF53X) || defined(CONFIG_SOC_COMPATIBLE_NRF54LX)) && \
1879+
#if (!defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) && !defined(CONFIG_SOC_COMPATIBLE_NRF54LX)) || \
1880+
((defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || \
1881+
defined(CONFIG_SOC_COMPATIBLE_NRF54LX)) && \
18811882
!defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER))
18821883
hal_radio_end_time_capture_ppi_config();
18831884
hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
1884-
#endif /* (!CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_SOC_COMPATIBLE_NRF54LX) ||
1885-
* ((CONFIG_SOC_COMPATIBLE_NRF53X || CONFIG_SOC_COMPATIBLE_NRF54LX) &&
1885+
#endif /* (!CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET && !CONFIG_SOC_COMPATIBLE_NRF54LX) ||
1886+
* ((CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || CONFIG_SOC_COMPATIBLE_NRF54LX) &&
18861887
* !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
18871888
*/
18881889
}

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