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drivers: interrupt-controller: Add support Group interrupt driver on RX
Add support Group interrupt driver on RX Signed-off-by: TatsuyaOgawa <[email protected]>
1 parent 9e2c43d commit 2038606

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6 files changed

+300
-3
lines changed

6 files changed

+300
-3
lines changed

‎drivers/interrupt_controller/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ zephyr_library_sources_ifdef(CONFIG_XMC4XXX_INTC intc_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_NXP_PINT intc_nxp_pint.c)
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zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_ICU intc_renesas_rx_icu.c)
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zephyr_library_sources_ifdef(CONFIG_RENESAS_RZ_EXT_IRQ intc_renesas_rz_ext_irq.c)
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zephyr_library_sources_ifdef(CONFIG_RENESAS_RX_GRP_INTC intc_renesas_rx_grp_int.c)
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zephyr_library_sources_ifdef(CONFIG_NXP_IRQSTEER intc_nxp_irqsteer.c)
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zephyr_library_sources_ifdef(CONFIG_INTC_MTK_ADSP intc_mtk_adsp.c)
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zephyr_library_sources_ifdef(CONFIG_WCH_PFIC intc_wch_pfic.c)

‎drivers/interrupt_controller/Kconfig.renesas_rx‎

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Original file line numberDiff line numberDiff line change
@@ -7,3 +7,10 @@ config RENESAS_RX_ICU
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depends on DT_HAS_RENESAS_RX_ICU_ENABLED
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help
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Renesas RX series interrupt controller unit
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config RENESAS_RX_GRP_INTC
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bool "Renesas RX series group interrupt"
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default y
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depends on DT_HAS_RENESAS_RX_GRP_INTC_ENABLED
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help
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Renesas RX series group interrupt feature

‎drivers/interrupt_controller/intc_renesas_rx_grp_int.c‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,177 @@
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/*
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* Copyright (c) 2021 KT-Elektronik, Klaucke und Partner GmbH
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_rx_grp_intc
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#include <zephyr/device.h>
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#include <zephyr/irq.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h>
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#include <errno.h>
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#if DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0
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extern void group_bl0_handler_isr(void);
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extern void group_bl1_handler_isr(void);
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extern void group_bl2_handler_isr(void);
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extern void group_al0_handler_isr(void);
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extern void group_al1_handler_isr(void);
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#define VECT_GROUP_BL0 DT_IRQN(DT_NODELABEL(group_irq_bl0))
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#define VECT_GROUP_BL1 DT_IRQN(DT_NODELABEL(group_irq_bl1))
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#define VECT_GROUP_BL2 DT_IRQN(DT_NODELABEL(group_irq_bl2))
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#define VECT_GROUP_AL0 DT_IRQN(DT_NODELABEL(group_irq_al0))
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#define VECT_GROUP_AL1 DT_IRQN(DT_NODELABEL(group_irq_al1))
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#define DEV_CFG(cfg, dev) struct rx_grp_int_cfg *cfg = (struct rx_grp_int_cfg *)(dev->config)
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/**
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* @brief configuration data for a group interrupt device
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*/
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struct rx_grp_int_cfg {
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/* address of the Group Interrupt Request Enable Register (GENxxx) */
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volatile uint32_t *gen;
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/* vector number of the interrupt */
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const uint8_t vect;
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/* priority of the interrupt */
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const uint8_t prio;
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};
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static struct k_spinlock lock;
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int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback,
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void *context)
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{
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bsp_int_err_t err;
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ARG_UNUSED(dev);
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err = R_BSP_InterruptWrite_EX(vector, callback, context);
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if (err != BSP_INT_SUCCESS) {
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err = -EINVAL;
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}
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return err;
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}
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int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set)
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{
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if (dev == NULL) {
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return -EINVAL;
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}
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DEV_CFG(cfg, dev);
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volatile bsp_int_ctrl_t group_priority;
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bsp_int_err_t err;
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group_priority.ipl = cfg->prio;
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k_spinlock_key_t key = k_spin_lock(&lock);
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if (set) {
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/* ENABLE GROUP INTERRUPTS */
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err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_ENABLE,
81+
(void *)&group_priority);
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} else {
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/* DISABLE GROUP INTERRUPTS */
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err = R_BSP_InterruptControl(vector, BSP_INT_CMD_GROUP_INTERRUPT_DISABLE, NULL);
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}
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k_spin_unlock(&lock, key);
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if (err != BSP_INT_SUCCESS) {
90+
return -EINVAL;
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}
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return err;
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}
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int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set)
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{
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if ((is_number < 0 || is_number > 31) || dev == NULL) {
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return -EINVAL;
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}
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DEV_CFG(cfg, dev);
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k_spinlock_key_t key = k_spin_lock(&lock);
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if (set) {
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/* ENABLE GROUP INTERRUPTS */
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*cfg->gen |= (1U << is_number);
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} else {
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/* DISABLE GROUP INTERRUPTS */
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*cfg->gen = 0;
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}
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k_spin_unlock(&lock, key);
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return 0;
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}
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static int rx_grp_intc_init(const struct device *dev)
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{
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DEV_CFG(cfg, dev);
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volatile bsp_int_ctrl_t group_priority;
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int err = 0;
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group_priority.ipl = cfg->prio;
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switch (cfg->vect) {
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case VECT_GROUP_BL0:
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IRQ_CONNECT(VECT_GROUP_BL0, 0, group_bl0_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_BL1:
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IRQ_CONNECT(VECT_GROUP_BL1, 0, group_bl1_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_BL2:
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IRQ_CONNECT(VECT_GROUP_BL2, 0, group_bl2_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_AL0:
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IRQ_CONNECT(VECT_GROUP_AL0, 0, group_al0_handler_isr, NULL, 0);
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break;
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case VECT_GROUP_AL1:
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IRQ_CONNECT(VECT_GROUP_AL1, 0, group_al1_handler_isr, NULL, 0);
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break;
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default:
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/* ERROR */
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err = -EINVAL;
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break;
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}
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irq_enable(cfg->vect);
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return err;
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}
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#endif /* ZEPHYR_INCLUDE_INTC_GRP_RX_ARCH_H_ */ /* DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0 */
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#define GRP_INT_RX_INIT(index) \
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static struct rx_grp_int_cfg rx_grp_int_##index##_cfg = { \
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.gen = (uint32_t *)DT_INST_REG_ADDR_BY_NAME(index, GEN), \
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.vect = DT_INST_IRQN(index), \
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.prio = DT_INST_IRQ(index, priority)}; \
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static int rx_grp_int_##index##_init(const struct device *dev) \
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{ \
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return rx_grp_intc_init(dev); \
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} \
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DEVICE_DT_INST_DEFINE(index, rx_grp_int_##index##_init, NULL, NULL, \
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&rx_grp_int_##index##_cfg, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, NULL);
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DT_INST_FOREACH_STATUS_OKAY(GRP_INT_RX_INIT);

‎dts/bindings/interrupt-controller/renesas,rx-grp-intc.yaml‎

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@@ -0,0 +1,22 @@
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# Copyright (c) 2021 KT-Elektronik Klaucke und Partner GmbH
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# Copyright (c) 2025 Renesas Electronics Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Renesas group interrupt
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compatible: "renesas,rx-grp-intc"
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include: [interrupt-controller.yaml, base.yaml]
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properties:
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reg:
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required: true
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reg-names:
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required: true
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"#interrupt-cells":
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const: 2
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interrupt-cells:
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- irq
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- priority

‎dts/rx/renesas/rx26t-common.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -38,9 +38,11 @@
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<0x0087300 0xff>,
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<0x00872f0 0x02>,
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<0x0087500 0x0f>,
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<0x0087510 0x01>,
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<0x0087514 0x01>;
43-
reg-names = "IR", "IER", "IPR", "FIR", "IRQCR", "IRQFLTE", "IRQFLTC0";
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<0x0087520 0x01>,
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<0x0087521 0x01>,
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<0x0087528 0x01>,
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<0x008752a 0x01>;
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reg-names = "IR", "IER", "IPR", "FIR","IRQCR","IRQFLTE","IRQFLTE1","IRQFLTC0","IRQFLTC1";
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4547
swint1: swint1@872e0 {
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compatible = "renesas,rx-swint";
@@ -558,5 +560,77 @@
558560
zephyr,memory-region = "OFSM";
559561
status = "okay";
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};
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group_irq_be0: grp_intc@87600 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "be0";
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reg = <0x00087600 0x04>,
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<0x00087640 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <106 4>;
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status = "disabled";
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#interrupt-cells = <2>;
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};
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group_irq_bl0: grp_intc@87630 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
579+
label = "bl0";
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reg = <0x00087630 0x04>,
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<0x00087670 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <110 4>;
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status = "okay";
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#interrupt-cells = <2>;
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};
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group_irq_bl1: grp_intc@87634 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "bl1";
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reg = <0x00087634 0x04>,
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<0x00087674 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <111 4>;
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status = "disabled";
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#interrupt-cells = <2>;
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};
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group_irq_bl2: grp_intc@87638 {
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compatible = "renesas,rx-grp-intc";
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interrupt-controller;
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label = "bl2";
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reg = <0x00087638 0x04>,
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<0x00087678 0x04>;
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reg-names = "GRP", "GEN";
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interrupts = <107 4>;
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status = "disabled";
609+
#interrupt-cells = <2>;
610+
};
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group_irq_al0: grp_intc@87830 {
613+
compatible = "renesas,rx-grp-intc";
614+
interrupt-controller;
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label = "al0";
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reg = <0x00087830 0x04>,
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<0x00087870 0x04>;
618+
reg-names = "GRP", "GEN";
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interrupts = <112 4>;
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status = "disabled";
621+
#interrupt-cells = <2>;
622+
};
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group_irq_al1: grp_intc@87834 {
625+
compatible = "renesas,rx-grp-intc";
626+
interrupt-controller;
627+
label = "al1";
628+
reg = <0x00087834 0x04>,
629+
<0x00087874 0x04>;
630+
reg-names = "GRP", "GEN";
631+
interrupts = <113 4>;
632+
status = "disabled";
633+
#interrupt-cells = <2>;
634+
};
561635
};
562636
};

‎include/zephyr/drivers/interrupt_controller/intc_renesas_rx_grp_int.h‎

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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_INTC_GRP_RX_ARCH_H_
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#define ZEPHYR_INCLUDE_INTC_GRP_RX_ARCH_H_
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#include "platform.h"
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int rx_grp_intc_set_callback(const struct device *dev, bsp_int_src_t vector, bsp_int_cb_t callback,
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void *context);
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int rx_grp_intc_set_grp_int(const struct device *dev, bsp_int_src_t vector, bool set);
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int rx_grp_intc_set_gen(const struct device *dev, int is_number, bool set);
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#endif /* ZEPHYR_INCLUDE_INTC_GRP_RX_ARCH_H_ */

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