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dts: infineon: psc3: Adding DTS files for PSC3 series
Adding DTS files and MPN files for PCS3M5_EVK Signed-off-by: Sreeram Tatapudi <[email protected]>
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‎dts/arm/infineon/cat1b/mpns/psc3m3edabq1.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-48.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@42150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x42150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

‎dts/arm/infineon/cat1b/mpns/psc3m3edabq1_s.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-48_s.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@52150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x52150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@12000000 {
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compatible = "soc-nv-flash";
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reg = <0x12000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

‎dts/arm/infineon/cat1b/mpns/psc3m3edacq1.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-64.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@42150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x42150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};

‎dts/arm/infineon/cat1b/mpns/psc3m3edacq1_s.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-64_s.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@52150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x52150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@12000000 {
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compatible = "soc-nv-flash";
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reg = <0x12000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};

‎dts/arm/infineon/cat1b/mpns/psc3m3edlgq1.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.vqfn-48.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@42150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x42150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

‎dts/arm/infineon/cat1b/mpns/psc3m3edlgq1_s.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.vqfn-48_s.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@52150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x52150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@12000000 {
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compatible = "soc-nv-flash";
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reg = <0x12000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

‎dts/arm/infineon/cat1b/mpns/psc3m3edlhq1.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.vqfn-64.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@42150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x42150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};

‎dts/arm/infineon/cat1b/mpns/psc3m3edlhq1_s.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.vqfn-64_s.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@52150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x52150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@12000000 {
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compatible = "soc-nv-flash";
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reg = <0x12000000 DT_SIZE_K(128)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};

‎dts/arm/infineon/cat1b/mpns/psc3m3fds2abq1.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-48.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@42150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x42150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@2000000 {
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compatible = "soc-nv-flash";
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reg = <0x2000000 DT_SIZE_K(256)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

‎dts/arm/infineon/cat1b/mpns/psc3m3fds2abq1_s.dtsi

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/*
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* copyright (c) (2016-2025), Cypress Semiconductor Corporation
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* (an Infineon company) or an affiliate of Cypress Semiconductor Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include "../psc3/psc3.e-lqfp-48_s.dtsi"
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/ {
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cpu@0 {
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clock-frequency = <100000000>;
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};
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flash-controller@52150000 {
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compatible = "infineon,cat1-flash-controller";
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reg = <0x52150000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@12000000 {
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compatible = "soc-nv-flash";
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reg = <0x12000000 DT_SIZE_K(256)>;
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write-block-size = <512>;
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erase-block-size = <512>;
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};
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};
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};
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/delete-node/ &scb4;
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/delete-node/ &scb5;

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