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taltenbachkartben
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drivers: flash: stm32_qspi: Simplify #ifdef for dual-flash
In multiple places, "#if DT_PROP(DT_NODELABEL(quadspi), dual_flash) && defined(QUADSPI_CR_DFM)" was used to guard sections specific to the dual-flash feature. This is quite long and "#ifdef STM32_QSPI_DOUBLE_FLASH" is now used instead. Note the presence of QUADSPI_CR_DFM is no more checked. This is not considered as an issue since when QUADSPI_CR_DFM is not available, the QSPI hardware doesn't support dual-flash mode so this mode must not be enabled in the devicetree. With that change, enabling dual-flash mode when not available causes a compile-time error. Signed-off-by: Thomas Altenbach <[email protected]>
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drivers/flash/flash_stm32_qspi.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -395,7 +395,7 @@ static int qspi_read_sfdp(const struct device *dev, off_t addr, void *data,
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396396
LOG_INF("Reading SFDP");
397397

398-
#if DT_PROP(DT_NODELABEL(quadspi), dual_flash) && defined(QUADSPI_CR_DFM)
398+
#if STM32_QSPI_DOUBLE_FLASH
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/*
400400
* In dual flash mode, reading the SFDP table would cause the parameters from both flash
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* memories to be read (first byte read would be the first SFDP byte from the first flash,
@@ -406,7 +406,7 @@ static int qspi_read_sfdp(const struct device *dev, off_t addr, void *data,
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*/
407407
MODIFY_REG(dev_data->hqspi.Instance->CR, QUADSPI_CR_DFM, QSPI_DUALFLASH_DISABLE);
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LOG_DBG("Dual flash mode disabled while reading SFDP");
409-
#endif /* dual_flash */
409+
#endif /* STM32_QSPI_DOUBLE_FLASH */
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QSPI_CommandTypeDef cmd = {
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.Instruction = JESD216_CMD_READ_SFDP,
@@ -438,7 +438,7 @@ static int qspi_read_sfdp(const struct device *dev, off_t addr, void *data,
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dev_data->cmd_status = 0;
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end:
441-
#if DT_PROP(DT_NODELABEL(quadspi), dual_flash) && defined(QUADSPI_CR_DFM)
441+
#if STM32_QSPI_DOUBLE_FLASH
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/* Re-enable the dual flash mode */
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MODIFY_REG(dev_data->hqspi.Instance->CR, QUADSPI_CR_DFM, QSPI_DUALFLASH_ENABLE);
444444
#endif /* dual_flash */
@@ -1551,7 +1551,7 @@ static int flash_stm32_qspi_init(const struct device *dev)
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dev_data->hqspi.Init.ClockPrescaler = prescaler;
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/* Give a bit position from 0 to 31 to the HAL init minus 1 for the DCR1 reg */
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dev_data->hqspi.Init.FlashSize = find_lsb_set(dev_cfg->flash_size) - 2;
1554-
#if DT_PROP(DT_NODELABEL(quadspi), dual_flash) && defined(QUADSPI_CR_DFM)
1554+
#if STM32_QSPI_DOUBLE_FLASH
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dev_data->hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE;
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dev_data->hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_3_CYCLE;
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dev_data->hqspi.Init.DualFlash = QSPI_DUALFLASH_ENABLE;
@@ -1566,7 +1566,7 @@ static int flash_stm32_qspi_init(const struct device *dev)
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* is disabled.
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*/
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dev_data->hqspi.Init.FlashID = QSPI_FLASH_ID_1;
1569-
#endif /* dual_flash */
1569+
#endif /* STM32_QSPI_DOUBLE_FLASH */
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HAL_QSPI_Init(&dev_data->hqspi);
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