driver: interrupt_controller: rename intc_nuclei_eclic to intc_clic

Rename intc_nuclei_eclic to intc_clic, and separate CLIC register
definitions into intc_clic.h.

Signed-off-by: Jimmy Zheng <[email protected]>

Author: jimmyzhe

drivers/interrupt_controller/CMakeLists.txt

@@ -31,8 +31,8 @@ zephyr_library_sources_ifdef(CONFIG_INTC_ESP32              intc_esp32.c)
 zephyr_library_sources_ifdef(CONFIG_SWERV_PIC               intc_swerv_pic.c)
 zephyr_library_sources_ifdef(CONFIG_VEXRISCV_LITEX_IRQ      intc_vexriscv_litex.c)
 zephyr_library_sources_ifdef(CONFIG_VIM                     intc_vim.c)
-zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC            intc_nuclei_eclic.c)
-zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC            intc_nuclei_eclic.S)
+zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC            intc_clic.c)
+zephyr_library_sources_ifdef(CONFIG_NUCLEI_ECLIC            intc_clic.S)
 zephyr_library_sources_ifdef(CONFIG_NRFX_CLIC               intc_nrfx_clic.c)
 zephyr_library_sources_ifdef(CONFIG_NRFX_CLIC               intc_nrfx_clic.S)
 zephyr_library_sources_ifdef(CONFIG_NXP_S32_EIRQ            intc_eirq_nxp_s32.c)

…interrupt_controller/intc_nuclei_eclic.S drivers/interrupt_controller/intc_clic.Sdrivers/interrupt_controller/intc_nuclei_eclic.S renamed to drivers/interrupt_controller/intc_clic.S drivers/interrupt_controller/intc_nuclei_eclic.S renamed to drivers/interrupt_controller/intc_clic.S

@@ -15,74 +15,10 @@
 
 #include <zephyr/sw_isr_table.h>
 #include <zephyr/drivers/interrupt_controller/riscv_clic.h>
+#include "intc_clic.h"
 
 #define DT_DRV_COMPAT nuclei_eclic
 
-union CLICCFG {
-	struct {
-		uint8_t _reserved0 : 1;
-		/** number of interrupt level bits */
-		uint8_t nlbits : 4;
-		uint8_t _reserved1 : 2;
-		uint8_t _reserved2 : 1;
-	} b;
-	uint8_t w;
-};
-
-union CLICINFO {
-	struct {
-		/** number of max supported interrupts */
-		uint32_t numint : 13;
-		/** architecture version */
-		uint32_t version : 8;
-		/** supported bits in the clicintctl */
-		uint32_t intctlbits : 4;
-		uint32_t _reserved0 : 7;
-	} b;
-	uint32_t qw;
-};
-
-union CLICMTH {
-	uint8_t w;
-};
-
-union CLICINTIP {
-	struct {
-		/** Interrupt Pending */
-		uint8_t IP : 1;
-		uint8_t reserved0 : 7;
-	} b;
-	uint8_t w;
-};
-
-union CLICINTIE {
-	struct {
-		/** Interrupt Enabled */
-		uint8_t IE : 1;
-		uint8_t reserved0 : 7;
-	} b;
-	uint8_t w;
-};
-
-union CLICINTATTR {
-	struct {
-		/** 0: non-vectored 1:vectored */
-		uint8_t shv : 1;
-		/** 0: level 1: rising edge 2: falling edge */
-		uint8_t trg : 2;
-		uint8_t reserved0 : 3;
-		uint8_t reserved1 : 2;
-	} b;
-	uint8_t w;
-};
-
-struct CLICCTRL {
-	volatile union CLICINTIP INTIP;
-	volatile union CLICINTIE INTIE;
-	volatile union CLICINTATTR INTATTR;
-	volatile uint8_t INTCTRL;
-};
-
 /** CLIC INTATTR: TRIG Mask */
 #define CLIC_INTATTR_TRIG_Msk  0x3U
 

…interrupt_controller/intc_nuclei_eclic.c drivers/interrupt_controller/intc_clic.cdrivers/interrupt_controller/intc_nuclei_eclic.c renamed to drivers/interrupt_controller/intc_clic.c drivers/interrupt_controller/intc_nuclei_eclic.c renamed to drivers/interrupt_controller/intc_clic.c

@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2021 Tokita, Hiroshi <[email protected]>
+ * Copyright (c) 2025 Andes Technology Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_CLIC_H_
+#define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_CLIC_H_
+
+union CLICCFG {
+	struct {
+		uint32_t _reserved0: 1;
+		/** number of interrupt level bits */
+		uint32_t nlbits: 4;
+		/** number of clicintattr[i].MODE bits */
+		uint32_t nmbits: 2;
+		uint32_t _reserved1: 25;
+	} w;
+	uint32_t qw;
+};
+
+union CLICINTIP {
+	struct {
+		/** Interrupt Pending */
+		uint8_t IP: 1;
+		uint8_t reserved0: 7;
+	} b;
+	uint8_t w;
+};
+
+union CLICINTIE {
+	struct {
+		/** Interrupt Enabled */
+		uint8_t IE: 1;
+		uint8_t reserved0: 7;
+	} b;
+	uint8_t w;
+};
+
+union CLICINTATTR {
+	struct {
+		/** 0: non-vectored 1:vectored */
+		uint8_t shv: 1;
+		/** 0: level 1: rising edge 2: falling edge */
+		uint8_t trg: 2;
+		uint8_t reserved0: 3;
+		uint8_t mode: 2;
+	} b;
+	uint8_t w;
+};
+
+union CLICCTRL {
+	struct {
+		volatile union CLICINTIP INTIP;
+		volatile union CLICINTIE INTIE;
+		volatile union CLICINTATTR INTATTR;
+		volatile uint8_t INTCTRL;
+	} w;
+	uint32_t qw;
+};
+
+union CLICINFO {
+	struct {
+		/** number of max supported interrupts */
+		uint32_t numint: 13;
+		/** architecture version */
+		uint32_t version: 8;
+		/** supported bits in the clicintctl */
+		uint32_t intctlbits: 4;
+		uint32_t _reserved0: 7;
+	} b;
+	uint32_t qw;
+};
+
+union CLICMTH {
+	struct {
+		uint32_t reserved0: 24;
+		/**  machine mode interrupt level threshold */
+		uint32_t mth: 8;
+	} b;
+	uint32_t qw;
+};
+
+#endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_INTC_CLIC_H_ */