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drivers: pinctrl: mspm0: Add a pinctrl driver for TI MSPM0
Added a pinctrl driver support for MSPM0 Family. Signed-off-by: Saravanan Sekar <[email protected]> Signed-off-by: Jackson Farley <[email protected]>
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‎drivers/pinctrl/CMakeLists.txt

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@@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_ITE_IT8XXX2 pinctrl_ite_it8xxx2.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_NPCX pinctrl_npcx.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_NUMICRO pinctrl_numicro.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_NRF pinctrl_nrf.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_MSPM0 pinctrl_mspm0.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM0 pinctrl_sam0.c)

‎drivers/pinctrl/Kconfig

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@@ -45,6 +45,7 @@ source "drivers/pinctrl/Kconfig.it8xxx2"
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source "drivers/pinctrl/Kconfig.npcx"
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source "drivers/pinctrl/Kconfig.numicro"
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source "drivers/pinctrl/Kconfig.nrf"
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source "drivers/pinctrl/Kconfig.mspm0"
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source "drivers/pinctrl/Kconfig.rpi_pico"
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source "drivers/pinctrl/Kconfig.sam"
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source "drivers/pinctrl/Kconfig.sam0"

‎drivers/pinctrl/Kconfig.mspm0

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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2025 Texas Instruments
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config PINCTRL_MSPM0
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bool "TI pinctrl MSPM0 driver"
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default y
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depends on DT_HAS_TI_MSPM0_PINCTRL_ENABLED
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help
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Enable support for the PINCTRL on TI MSPM0 series.

‎drivers/pinctrl/pinctrl_mspm0.c

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/*
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* Copyright (c) 2025 Texas Instruments
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/init.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <ti/driverlib/dl_gpio.h>
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#define DT_DRV_COMPAT ti_mspm0_pinctrl
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#define MSPM0_PINCM(pinmux) (pinmux >> 0x10)
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#define MSPM0_PIN_FUNCTION(pinmux) (pinmux & 0x3F)
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int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins,
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uint8_t pin_cnt,
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uintptr_t reg)
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{
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ARG_UNUSED(reg);
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uint8_t pin_function;
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uint32_t pin_cm;
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uint32_t iomux;
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for (int i = 0; i < pin_cnt; i++) {
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pin_cm = MSPM0_PINCM(pins[i].pinmux);
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pin_function = MSPM0_PIN_FUNCTION(pins[i].pinmux);
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iomux = pins[i].iomux;
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if (pin_function == 0x00) {
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DL_GPIO_initPeripheralAnalogFunction(pin_cm);
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} else {
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DL_GPIO_initPeripheralFunction(pin_cm,
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(iomux | pin_function));
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}
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}
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return 0;
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}

‎dts/bindings/pinctrl/ti,mspm0-pinctrl.yaml

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# Copyright (c) 2025 Texas Instruments
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# Copyright (c) 2025 Linumiz
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# SPDX-License-Identifier: Apache-2.0
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description: |
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TI MSPM0 pinctrl node.
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Device pin configuration should be placed in the child nodes of this node.
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Populate the 'pinmux' field with a pair consisting of a pin number and its
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IO functions.
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The node has the 'pinctrl' node label set in your SoC's devicetree,
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so you can modify it like this:
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&pinctrl {
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/* your modifications go here */
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};
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All device pin configurations should be placed in child nodes of the
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'pinctrl' node, as in the i2c0 example shown at the end.
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Here is a list of
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supported standard pin properties:
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- bias-disable: Disable pull-up/down.
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- bias-pull-down: Enable pull-down resistor.
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- bias-pull-up: Enable pull-up resistor.
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- drive-open-drain: Output driver is open-drain.
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- drive-open-drain: Output driver is open-source.
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- drive-strength: Maximum current that can be sourced from the pin.
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- input-enable: enable input.
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- ti,invert: enable logical inversion of a digital input or output
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- ti,hysteresis: enable hysteresis control on open-drain pins
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An example for MSPM0 family, include the chip level pinctrl
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DTSI file in the board level DTS:
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#include <dt-bindings/pinctrl/mspm0-pinctrl.h>
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We want to configure the I2C pins to open drain, with pullup enabled
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and input enabled.
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To change a pin's pinctrl default properties add a reference to the
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pin in the board's DTS file or in the project overlay and set the
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properties.
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb2_pull_up &i2c1_sda_pb3_pull_up>;
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pinctrl-names = "default";
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}
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The i2c1_scl_pb2_pull_up corresponds to the following pin configuration in
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the board dts file:
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&pinctrl {
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i2c1_scl_pb2_pull_up: i2c1_scl_pb2_pull_up {
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pinmux = <MSP_PINMUX(15,MSPM0_PIN_FUNCTION_4)>;
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input-enable;
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bias-pull-up;
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drive-open-drain;
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};
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};
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Pin pb2 refers to the device pin name that one would see printed on the
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launchpad, and the number 15 in the pinmux define refers to the PINCMx.
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These are obtained from the device-specific datasheet.
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compatible: "ti,mspm0-pinctrl"
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include: base.yaml
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properties:
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reg:
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required: true
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child-binding:
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description: |
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This binding gives a base representation of the MSPM0
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pins configuration.
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- bias-disable
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- bias-pull-down
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- bias-pull-up
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- bias-high-impedance
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- drive-open-drain
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- drive-open-source
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- drive-strength
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- input-enable
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properties:
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pinmux:
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required: true
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type: int
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description: |
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MSPM0 pin's configuration (IO pin, IO function).
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drive-strength:
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enum:
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- 6
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- 20
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default: 6
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description: |
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The drive strength controls the maximum output drive strength sunk or
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sourced by an I/O pin.
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6: max 6 mA (SoC default)
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20: max 20 mA on high-drive capable IOs only (HDIO).
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ti,invert:
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type: boolean
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description: |
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Enables inversion of the input or output using the internal
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inversion capability of the GPIO
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ti,hysteresis:
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type: boolean
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description: |
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Enables the hysteresis control for access to CMOS logic
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(on open-drain capable pins)

‎include/zephyr/dt-bindings/pinctrl/mspm0-pinctrl.h

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/*
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* Copyright (c) 2025 Texas Instruments
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _MSPM0_DT_BINDINGS_PINCTRL_H_
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#define _MSPM0_DT_BINDINGS_PINCTRL_H_
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#define MSP_PORT_INDEX_BY_NAME(x) ((x == "PORTA") ? 0 : 1)
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#define MSPM0_PIN_FUNCTION_ANALOG (0x00000000)
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#define MSPM0_PIN_FUNCTION_GPIO (0x00000001)
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#define MSPM0_PIN_FUNCTION_2 (0x00000002)
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#define MSPM0_PIN_FUNCTION_3 (0x00000003)
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#define MSPM0_PIN_FUNCTION_4 (0x00000004)
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#define MSPM0_PIN_FUNCTION_5 (0x00000005)
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#define MSPM0_PIN_FUNCTION_6 (0x00000006)
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#define MSPM0_PIN_FUNCTION_7 (0x00000007)
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#define MSPM0_PIN_FUNCTION_8 (0x00000008)
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#define MSPM0_PIN_FUNCTION_9 (0x00000009)
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#define MSPM0_PIN_FUNCTION_10 (0x0000000A)
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/* Creates a concatenation of the correct pin function based on the pin control
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* management register offset and the function suffix.
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*/
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#define MSP_PINMUX(pincm, function) (((pincm - 1) << 0x10) | function)
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#endif

‎soc/ti/mspm0/mspm0g/pinctrl_soc.h

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/*
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* Copyright (c) 2025 Texas Instruments
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* Copyright (c) 2025 Linumiz
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __ZEPHYR_SOC_ARM_TI_MSPM0_M0G_PINCTRL_SOC_H__
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#define __ZEPHYR_SOC_ARM_TI_MSPM0_M0G_PINCTRL_SOC_H__
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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#include <zephyr/dt-bindings/pinctrl/mspm0-pinctrl.h>
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#define MSP_GPIO_RESISTOR_PULL_DOWN (16)
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#define MSP_GPIO_RESISTOR_PULL_UP (17)
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#define MSP_GPIO_INPUT_ENABLE (18)
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#define MSP_GPIO_HYSTERESIS_ENABLED (19)
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#define MSP_GPIO_HIGH_DRIVE (20)
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#define MSP_GPIO_OPEN_DRAIN_OUTPUT (25)
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#define MSP_GPIO_INVERSION_ENABLED (26)
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#define MSP_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux)
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#define MSP_PIN_CONTROL_IOMUX_INIT(node_id) \
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((DT_PROP(node_id, bias_pull_up) << MSP_GPIO_RESISTOR_PULL_UP) | \
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(DT_PROP(node_id, bias_pull_down) << MSP_GPIO_RESISTOR_PULL_DOWN) | \
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(DT_PROP(node_id, drive_open_drain) << MSP_GPIO_OPEN_DRAIN_OUTPUT) | \
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(DT_ENUM_IDX(node_id, drive_strength) << MSP_GPIO_HIGH_DRIVE) | \
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(DT_PROP(node_id, ti_hysteresis) << MSP_GPIO_HYSTERESIS_ENABLED) | \
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(DT_PROP(node_id, ti_invert) << MSP_GPIO_INVERSION_ENABLED) | \
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(DT_PROP(node_id, input_enable) << MSP_GPIO_INPUT_ENABLE))
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typedef struct pinctrl_soc_pin {
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/* PINCM register index and pin function */
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uint32_t pinmux;
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/* IOMUX Pin Control Management (direction, inversion, pullups) */
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uint32_t iomux;
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} pinctrl_soc_pin_t;
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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{.pinmux = MSP_PINMUX_INIT(DT_PROP_BY_IDX(node_id, prop, idx)), \
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.iomux = MSP_PIN_CONTROL_IOMUX_INIT(DT_PROP_BY_IDX(node_id, prop, idx))},
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{ \
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DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) \
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}
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#endif /* __ZEPHYR_SOC_ARM_TI_MSPM0_M0G_PINCTRL_SOC_H__ */

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