i2c: stm32: Added DMA stop for various i2c comms conditions

Added stop DMA fot transmit complete or other master end conditions

Signed-off-by: Simon Gilbert <[email protected]>

Author: sgilbert182

drivers/i2c/i2c_ll_stm32_v2.c

@@ -117,6 +117,36 @@ static struct stm32_i2c_timings_t i2c_valid_timing[STM32_I2C_VALID_TIMING_NBR];
 static uint32_t i2c_valid_timing_nbr;
 #endif /* CONFIG_I2C_STM32_V2_TIMING */
 
+#ifdef CONFIG_I2C_STM32_V2_DMA
+static int configure_dma(struct stream const *dma, struct dma_config *dma_cfg,
+			 struct dma_block_config *blk_cfg)
+{
+	if (!device_is_ready(dma->dev_dma)) {
+		LOG_ERR("DMA device not ready");
+		return -ENODEV;
+	}
+
+	dma_cfg->head_block = blk_cfg;
+	dma_cfg->block_count = 1;
+
+	int ret = dma_config(dma->dev_dma, dma->dma_channel, dma_cfg);
+
+	if (ret != 0) {
+		LOG_ERR("Problem setting up DMA: %d", ret);
+		return ret;
+	}
+
+	ret = dma_start(dma->dev_dma, dma->dma_channel);
+
+	if (ret != 0) {
+		LOG_ERR("Problem starting DMA: %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+#endif /* CONFIG_I2C_STM32_V2_DMA */
+
 static inline void msg_init(const struct device *dev, struct i2c_msg *msg,
 			    uint8_t *next_msg_flags, uint16_t slave,
 			    uint32_t transfer)
@@ -151,6 +181,45 @@ static inline void msg_init(const struct device *dev, struct i2c_msg *msg,
 #if defined(CONFIG_I2C_TARGET)
 		data->master_active = true;
 #endif
+
+#ifdef CONFIG_I2C_STM32_V2_DMA
+		if (msg->len) {
+			if (msg->flags & I2C_MSG_READ) {
+				/* Configure RX DMA */
+				data->dma_blk_cfg.source_address = LL_I2C_DMA_GetRegAddr(
+					cfg->i2c, LL_I2C_DMA_REG_DATA_RECEIVE);
+				data->dma_blk_cfg.dest_address = (uint32_t)msg->buf;
+				data->dma_blk_cfg.block_size = msg->len;
+
+				if (configure_dma(&cfg->rx_dma, &data->dma_cfg,
+						  &data->dma_blk_cfg) != 0) {
+					LOG_ERR("Problem setting up RX DMA");
+					return;
+				}
+				data->current.buf += msg->len;
+				data->current.len -= msg->len;
+				LL_I2C_EnableDMAReq_RX(i2c);
+			} else {
+				if (data->current.len) {
+					/* Configure TX DMA */
+					data->dma_blk_cfg.source_address =
+						(uint32_t)data->current.buf;
+					data->dma_blk_cfg.dest_address = LL_I2C_DMA_GetRegAddr(
+						cfg->i2c, LL_I2C_DMA_REG_DATA_TRANSMIT);
+					data->dma_blk_cfg.block_size = msg->len;
+					if (configure_dma(&cfg->tx_dma, &data->dma_cfg,
+							  &data->dma_blk_cfg) != 0) {
+						LOG_ERR("Problem setting up TX DMA");
+						return;
+					}
+					data->current.buf += data->current.len;
+					data->current.len -= data->current.len;
+					LL_I2C_EnableDMAReq_TX(i2c);
+				}
+			}
+		}
+#endif /* CONFIG_I2C_STM32_V2_DMA */
+
 		LL_I2C_Enable(i2c);
 
 		LL_I2C_GenerateStartCondition(i2c);
@@ -209,6 +278,17 @@ static void stm32_i2c_master_mode_end(const struct device *dev)
 		LL_I2C_Disable(i2c);
 	}
 #endif
+
+#ifdef CONFIG_I2C_STM32_V2_DMA
+	if (data->current.msg->flags & I2C_MSG_READ) {
+		dma_stop(cfg->rx_dma.dev_dma, cfg->rx_dma.dma_channel);
+		LL_I2C_DisableDMAReq_RX(i2c);
+	} else {
+		dma_stop(cfg->tx_dma.dev_dma, cfg->tx_dma.dma_channel);
+		LL_I2C_DisableDMAReq_TX(i2c);
+	}
+#endif /* CONFIG_I2C_STM32_V2_DMA */
+
 	k_sem_give(&data->device_sync_sem);
 }
 
@@ -508,6 +588,17 @@ static void stm32_i2c_event(const struct device *dev)
 			LL_I2C_GenerateStopCondition(i2c);
 		} else {
 			stm32_i2c_disable_transfer_interrupts(dev);
+
+#ifdef CONFIG_I2C_STM32_V2_DMA
+			if (data->current.msg->flags & I2C_MSG_READ) {
+				dma_stop(cfg->rx_dma.dev_dma, cfg->rx_dma.dma_channel);
+				LL_I2C_DisableDMAReq_RX(i2c);
+			} else {
+				dma_stop(cfg->tx_dma.dev_dma, cfg->tx_dma.dma_channel);
+				LL_I2C_DisableDMAReq_TX(i2c);
+			}
+#endif /* CONFIG_I2C_STM32_V2_DMA */
+
 			k_sem_give(&data->device_sync_sem);
 		}
 	}